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TMS320AV7110 датащи(PDF) 29 Page - Texas Instruments |
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TMS320AV7110 датащи(HTML) 29 Page - Texas Instruments |
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29 / 131 page ![]() DSP TMS320AV7110 Revision 3.1 10/08/99 22:18 Page 29 Six bit index into the PID filter table (PID CAM) that allows the application to attach each filter entry to a given active PID. The PID index is 6 bits, or 64 entries. Currently, the AV7110 hardware only supports 32 separate PIDs. The additional PID indexes are available for potential future AV7XXX implementations using this filter. [6] Enable Flag: • ‘0’ indicates filter is inactive. No comparisons are performed on the associated filter data. • ‘1’ indicates filter is enabled (active). Filtering will be performed on each valid section. [15:8] Non-Maskable Filter Byte Eight bit field that can be loaded with filter data. These eight bits cannot be masked. [31:16] Difference filter control bits. When diffence filtering is enabled for a byte, that byte is a match if any bits in the filter are different from the match register. Bit 31 enables diffence filtering for byte 15, bit 30 enables byte 14, etc. 6.2.2.3 Filter Mask Memory Addressing The 32 mask entries are memory mapped as follows. The starting word address of the filter is defined as: #define HW_MASK_BASE (ulong *) A mask entry corresponds to each filter. The mask is applied to both the filter memory words and the input match data words before they are compared. A '1' in the mask bit position indicates that the corresponding bits in the filter and input match data words should be compared. A '0' in the mask bit position indicates that the corresponding bits in the filter and input match data words are ignored for the comparison. 6.2.3 Filter Match Data Register definition Two sets of input match data registers are available. The two sets of registers enable the search to be taking place at the same time that the next search data is readied. The switching of the Filter Match Data Register from one register to the other is automatic. After the Attribute word is written to the match data register, subsequent writes to the Filter Match Data Register will load the other register. The Match Data Attribute should be the last word written because a write to this register initiates a search. The match data registers contain 12 bytes of data that is loaded by the CPU and an attribute match word. The match data is normally extracted from bytes 1,2 & 5-10 of the PSI/SI section header. Data extraction is performed by the firmware, from the Transport Packet stored into one of the internal SRAM TPP buffers. The attribute is the value of the PID index of the Transport Packet, from which the section data is extracted. Bits 8 to 15 of the match attribute word contains the one byte of non-maskable search data. Match High Word Match Low Word Match Low Word Match Attribute Word Match Attribute word 31 16 15 8 7 6 5 0 Unused Bits Non-maskable search byte PID Index [0:5] PID Index Six bit index. The PID Index in the Match attribute is compared with the PID Index in the filter table to indicate which filter entries to perform the comparison. |
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