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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS320AV7110 датащи(PDF) 66 Page - Texas Instruments |
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TMS320AV7110 датащи(HTML) 66 Page - Texas Instruments |
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66 / 131 page  DSP TMS320AV7110 Revision 3.1 10/08/99 22:18 Page 66 • TPP/program to decoder; TPP/DMA to HSDI (must be different PID’s) • TPP/program to decoder; TPP/program to 1394; memory/DMA to/from 1394 • TPP/program to 1394; 1394/program to TPP; memory/DMA to/from 1394 • 1394/program to TPP; memory/DMA to/from 1394 • 1394/program to TPP; TPP/DMA to 1394 Figure 21. Functional Block Diagram of High Speed Data Interface 13.1 IEEE 1394 Interface On power-up the IEEE 1394 Interface is enabled on the HSDI. An API call can be used to configure the HSDI for another mode or to return to the 1394 Interface if necessary. To complete the 1394 implementation, the ‘AV7110 requires an external Packetizer and Link Layer Controller, and a Physical Layer device. Figure 22 shows the connection between the ‘AV7110 and these devices. ‘AV7110 LINK Interface DVCR Packetizer Data BD port PHY Interface Ext. Bus 1394 port 1 1394 port 2 1394 port 3 MPEG2Lynx (TSB12LV41) Figure 22. 1394 Interface The command and control between the Packetizer or the Link layer interface device and the CPU is transmitted via the Extension Bus. The MPEG packet data from the bulk 1394 is transferred via dedicated pins on the 1394 interface from/to the TPP. The HSDI DMA channel is used for transferring Isochronous (I) or Asynchronous (A) packets to and from the Internal Data RAM. This data can then be processed by the application software as needed. The 1394 interface on the ‘AV7110 is designed to match that of Texas Instrument’s MPEG2Lynx Integrated Circuit (IC - TSB12LV41) via the following 15 signals: TPP ECD Reconfigurable I/O 1394 1284 Ext. DMA DMA Controller SRAM DMA DRAM SDRAM HSDI Chip Boundary |
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