TMS320AV7110 datasheet(8/131 Pages) TI

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DSP

TMS320AV7110

Revision 3.1

10/08/99 22:18

Page 8

2. Pin Functions

The ‘AV7110 is packaged in a 272 pin BGA. Table 1 is a list of pin names and their descriptions.

Multiplexed pins (muxed pins) are those whose definitions can be selected by the user using APIs. For

example, if there is no need for the SCVccDetect signal for the smart card interface on the set top box,

the pin SCVccDetect can be configured to become general purpose IO pin IO3.

Table 1. the ‘AV7110 Pins

Pin Name

I/O

Description

Transport Parser

DATAIN[7:0]

Data Input. Bit 7 is the first bit in the transport stream

DCLK

Input Data Clock. (Note 1). The maximum frequency is 7.5 MHz.

PACCLK

Packet Clock. Indicates valid packet data on DATAIN.

BYTE_START

Byte Start. Indicates the first byte of a transport packet for DVB.

DERROR

Data Error, active high. Indicates an error in the input data. Tie

low if not used.

Extension Bus

EXTRW

Extension Bus Read/Write. Selects read when high, write when

low.

EXTOE/EXTACTIVE

Active low, user programmable

EXTOE: default mode, asserted only during read cycles

EXTACTIVE: asserted for read/write cycles

EXTWAIT

Extension Bus Wait Request, active low

EXTADDR[24:0]

Extension Address bus: byte address

EXTDATA[31:16]

I/O

Extension Bus Data (16-bit or 32-bit EBI)

EXTDATA[15:0]

I/O

Extension Bus Data in 32-bit EBI mode

(muxed with other signal pins in 16-bit EBI mode)

EXTINT[2:0]

External Interrupt requests (IRQ) , active low.

EXTACK[2:0]

External Interrupt request acknowledge, active low

IO1

I/O

General Purpose I/O

IO2

I/O

General Purpose I/O

IO3

I/O

General Purpose I/O (muxed with SCVccDetect)

IO4

I/O

General Purpose I/O

IO5

I/O

General Purpose I/O

IO6

I/O

General Purpose I/O (muxed with EXTDATA[15])

IO7

I/O

General Purpose I/O (muxed with EXTDATA[14])

IO8

I/O

General Purpose I/O (muxed with EXTDATA[13])

IO9

I/O

General Purpose I/O (muxed with EXTDATA[12])

CLK40

40.5 MHz Clock output for the extension bus and HSDI interface

CS1

Chip Select 1. Selects EPROM

CS2

Chip Select 2.

CS3

Chip Select 3.

CS4

Chip Select 4.

CS5

Chip Select 5.

CS6

Chip Select 6.

RAS1

DRAM Row Address Strobe 1

RAS2

DRAM Row Address Strobe 2 (for 32-bit support)

RAS3

DRAM Row Address Strobe 3 (for 2

nd DRAM module at a fixed

address partition).

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