TMS320AV7110 datasheet(57/131 Pages) TI

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DSP

TMS320AV7110

Revision 3.1

10/08/99 22:18

Page 57

11. Synchronization

The ‘AV7110 uses the System Time Clock (STC) and Presentation Time Stamp (PTS) to determine the

playback time of the decoded audio and video data. The relationship between STC and PTS is

determined at the time of the generation of the respective elementary streams (ES). Upon reception, the

de-multiplexing software in the ‘AV7110 extracts the video PTS and inserts it in an array of PTS and

byte-count information maintained for the video decoder. For the audio, the PTS information is

extracted by the audio decoder front end from the PES. The Video decoder contains an STC counter

that is clocked by the system clock (27 MHz.) and normalized to a 90 KHz reference. The audio

decoder does not contain a counter. Instead, it gets updated from the system time reference counter

every 1.4 msec.

11.1 System Time Clock

The system reference counter is a 42 bit hardware/software hybrid counter as shown in Table 30.

Table 30. System time clock model

Bit 41 - 16

Bit 15 - 9

Bit 8 - 0

Software extension

Hardware counter (90 KHz.)

Hardware counter (27 MHz)

rollover at count of 300

A copy of the full 42 bit counter is kept in a set of two software long variables (64 bits total length)

When the lower 9 bits of the hardware counter roll over, the 90 KHz hardware counter is incremented.

When the hardware counter is incremented, an FIQ is generated to the firmware. The firmware will

increment the software extension and write the value of the STCsys + offset to the audio/video decoder if

the audio/video decoder synchronization is enabled.

11.2 Startup Synchronization

At startup the hardware STC counter is free running and the increments to the software extension of the

system STC take place every 1.4 ms. Both audio and video decoders are initialized to “free-run”. This

condition is identical for system startup as well as for re-synchronization after a channel change. When

a PCR channel is activated by the application software through an API, the on-chip software monitors

the incoming data in the PCR designated channel and reset the system common reference counter

STCsys to the first PCR that arrives in the designated stream (full 42 bits). At the same time, the video

and audio STC are initialized to the same value, if they are enabled via the appropriate API calls.

11.3 Runtime Synchronization

After the initial synchronization setup, the software will monitor the incoming video PTS values and

compares them to the most recent STC. The difference between the two should not exceed a user

programmable MAX_PTS_STC_DELTA. If it does, the PTS is discarded. Otherwise the delta is stored

in a circular 8 entry array. The average value of the array is calculated according to:

PTS_DELTA_AVRG = (

ΣArray[0..7]) >> 3

The value of MAX_PTS_STC_DELTA is defined by the user via a call to the API function

sysSetSyncParms().

If the absolute value of the incoming PTS exceeds a pre-determined maximum delta from the

PTS_DELTA_AVRG, the value is discarded (see Figure 18). This condition is calculated according to:

unsigned (PTS - PTS_DELTA_AVRG) <= PTS_GUARDBAND

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