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TMS320AV7110 датащи(PDF) 94 Page - Texas Instruments

номер детали TMS320AV7110
подробное описание детали  Integrated Digital Set-top Box Decoder Functional Specification
PDF  131 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

TMS320AV7110 датащи(HTML) 94 Page - Texas Instruments

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DSP
TMS320AV7110
Revision 3.1
10/08/99 22:18
Page 94
Register
Size R/W
Offset
Bits
Value
IR_FORMAT_ADDR
30
R/W 0x0E0C
29-0
Format register
IR_REPEAT_POS_ADDR
10
R/W
0x0E10
9-5
REPEAT-POSITION-END
4-0
REPEAT-POSITION-BEGIN
IR_REPEAT_STOP_ADDR
1
R/W
0x0E14
0
REPEAT-STOP
IR_CARRIER_ADDR
22
R/W
0x0E18
21-11
Carrier HI width
10-0
Carrier LO width
IR_A_ENTRY_ADDR
32
R/W
0x0E20
31-0
A entry
IR_D_ENTRY_ADDR
32
R/W
0x0E24
31-0
D entry
IR_OUTRDY_ADDR
2
R
0x0E28
1
EORQ_ST
0
OROUTRDY
GPIO1
32 R/W 0x1000
31:6
reserved (read zeros)
5
select register for muxed gpios
0
gpio
1
other
4
ddio0 - delta detect io bit. Write a one to clear
ddio0.
3:2
gpio0_irq1: gpio1_irq0
00
Disable IRQ
01
Rising edge IRQ
10
Falling edge IRQ
11
State change IRQ
1
cio0 - configure IO
0
input
1
output
0
io0 writeable if cio0 is 1, reads value on gpio
pad
GPIO2
32 R/W 0x1100
Same as GPIO1
GPIO3
32 R/W 0x1200
Same as GPIO1
GPIO4
32 R/W 0x1300
Same as GPIO1
GPIO5
32 R/W 0x1400
Same as GPIO1
GPIO6
32 R/W 0x1500
Same as GPIO1
GPIO7
32 R/W 0x0600
Same as GPIO1
GPIO8
32 R/W 0x1700
Same as GPIO1
GPIO9
32 R/W 0x1800
Same as GPIO1
16.4 Audio Decoder Registers - Base Address 0x6C000000
Register
Size R/W
Offset
Bits
Value Description
AUD_CTRL_REG
32
R/W
0x0020 31:22
reserved (read zeroes)
21
Disable Sync
0
Enable Sync
1
Disable Sync
20
Byte Swap
0
no swap (bypass PCM data is in Little Endian)
1
swap bytes (bypass PCM data is in Big Endian)
19
Elementary Stream Playback
0
off (normal operation)
1
on, incoming data goes directly to audio decoder
bypassing the AFE



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