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MC56F81663 датащи(PDF) 47 Page - NXP Semiconductors |
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MC56F81663 датащи(HTML) 47 Page - NXP Semiconductors |
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47 / 73 page ![]() 10.3.7 Capacitance attributes Table 13. Capacitance attributes Description Symbol Min. Typ. Max. Unit Input capacitance CIN — 10 — pF Output capacitance COUT — 10 — pF 10.4 Switching specifications 10.4.1 Device clock specifications Table 14. Device clock specifications Symbol Description Min. Max. Unit Notes Normal run mode fSYSCLK Device (system and core) clock frequency • using relaxation oscillator • using external clock source 0.001 0 100 100 MHz fBUS Bus clock — 50 MHz 10.4.2 General switching specifications These general-purpose specifications apply to all signals configured for GPIO signals. Table 15. General switching specifications Description Min. Max. Unit Notes GPIO pin interrupt pulse width (digital glitch filter disabled) — Synchronous path 1.5 — Bus clock cycles 1 External RESET and NMI pin interrupt pulse width — Asynchronous path 100 — ns 2 GPIO pin interrupt pulse width — Asynchronous path 16 — ns 2 Port rise and fall time — 36 ns 3 1. The synchronous and asynchronous timing must be met. 2. This is the shortest pulse that is guaranteed to be recognized. 3. 75 pF load 10.5 Thermal specifications General MC56F81xxx, Rev. 1.1, 12/2020 NXP Semiconductors 47 |
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