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LAN7430 датащи(PDF) 63 Page - Microchip Technology

номер детали LAN7430
подробное описание детали  Low Power PCIe to Gigabit Ethernet Controller with Integrated Ethernet MAC / PHY
PDF  77 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN7430 датащи(HTML) 63 Page - Microchip Technology

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 2018-2019 Microchip Technology Inc.
DS00002631D-page 63
LAN7430/LAN7431
7.6.6.3
RGMII Receive Timing (RXC Internal Delay Enabled - MAC Provides Delay on Clock Input)
Note 7-30
7.2ns for 1000BASE-T operation, 36ns for 100BASE-TX operation, 360ns for 10BASE-T operation.
Minimum limits are non-sustainable long term.
Note 7-31
8ns for 1000BASE-T operation, 40ns for 100BASE-TX operation, 400ns for 10BASE-T operation.
Note 7-32
8.8ns for 1000BASE-T operation, 44ns for 100BASE-TX operation, 440ns for 10BASE-T operation.
Maximum limits are non-sustainable long term.
Note 7-33
45% for 1000BASE-T operation, 40% for 100BASE-TX or 10BASE-T operation.
Note 7-34
55% for 1000BASE-T operation, 60% for 100BASE-TX or 10BASE-T operation.
Note 7-35
A negative setup means that the data can arrive after the clock.
FIGURE 7-10:
RGMII RECEIVE TIMING (RXC INTERNAL DELAY ENABLED)
TABLE 7-18:
RGMII RECEIVE TIMING VALUES (RXC INTERNAL DELAY ENABLED)
Symbol
Description
Min
Typ
Max
Units
trxc
RXC period
Note 7-30
Note 7-31
Note 7-32
ns
tclkh
RXC high time
Note 7-33
50
Note 7-34
%
tclkl
RXC low time
Note 7-33
50
Note 7-34
%
tsetup
RXD[3:0], RX_CTL setup time to edge of RXC
-0.9
Note 7-35
ns
thold
RXD[3:0], RX_CTL hold time after edge of RXC
2.7
ns
RXC
RXD[3:0]
RX_CTL
tclkh
tclkl
trxc
RXD
[3:0]
RXD
[7:4]
RXDV
RXER
thold
tsetup
thold
tsetup
thold
tsetup
thold
tsetup



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