73 / 129 page

Port Definitions
68
PRELIMINARY V1.8
TABLE 40.
Definition of PCR
Figure 23.
Pcr & Port Direction Control: Port-0 To 3
14.4.
ZCR (Hi-Z Control Register)
Address
9BH
Bit Addr.
None
BIT
7
6
5
4
3
2
1
0
NAME
ZCR4
ZCR3
ZCR2
ZCR1
ZCR0
Definition
Reserved
bit
Reserved
bit
Reserved
bit
Port-4
Hi-Z
Control bit
0: Disable
1: Hi-Z
Enable
Port-3
Hi-Z
Control bit
0: Disable
1: Hi-Z
Enable
Port-2
Hi-Z
Control bit
0: Disable
1: Hi-Z
Enable
Port-1
Hi-Z
Control bit
0: Disable
1: Hi-Z
Enable
Port-0
Hi-Z
Control bit
0: Disable
1: Hi-Z
Enable
Reset Value
0
0
0
0
0
0
0
0
MUX
0
1
SFR
PxIO
[7:0]
SFR
PCR
bit-x
Direction
Control
from CPU
Signals
Output Enable
1: Output Mode
0: Input Mode
Pin
Pin Input
Port Latch or
Special Output
SFR
ZCR
bit-x
nand
HIZ
(PSCR)
and
NHIZ
0: Hi-Z
1: Normal
or
SIO/Timer
Output Enable
Inen
Digital In
Analog In
Port3.5