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WatchDog Timer
PRELIMINARY V1.8
27
TABLE 20.
Definition of WDCR
Reset
Value
0
1
0
1
0:
Pin Reset
1:
WD Reset
0
0
0
Read/
Write by
Software
R/W
R/W
R/W
R/W
R
R
R/W
R/W
Write by
Hardware
0 by Exter-
nal
Pin Reset
1 by
WD-Timer
Reset
Name
Bit
Description
WDON[1:0]
7 to 6
WD-Timer turn ON bits
[Bit Status: 01 (Initial Value)]
In this mode, the WD-Timer turns off.
This bit status makes a selected counting clock frozen. Thus, the 8-bit WD-Timer
Register keeps previous value without down-counting.
[Bit Status: 10]
In this mode, the WD-Timer turns on.
This bit status makes a selected counting clock run. Thus, the 8-bit WD-Timer
Register operates as a down-counter.
[Bit Status: 00 or 11]
Do NOT write these values on these two bits.
In these mode, the WD-Timer turns on just like status-10. The purpose of these
two redundant status is to prevent unexpected WD-Timer stop by device upset.
While the WD-Timer is running by setting 10 to the WDON[1:0], unexpected
electrical shock can make a WDON bit toggle. If another WDON bit retains its
value, the WD-Timer will be continuously running without stop.
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