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CS61310 датащи(PDF) 15 Page - Cirrus Logic |
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CS61310 датащи(HTML) 15 Page - Cirrus Logic |
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15 / 30 page ![]() CS61310 DS440F1 FEB ‘03 15 LOOPUP Loop Up Setting LOOPUP to “1” causes the data pattern 00001... to be repetitively transmitted. RPWDN Receiver Power Down When RPWDN = 1, the receiver circuitry is powered down, but the transmitter is still active. TxHIZ Transmitter High Impedance When TxHIZ = 1 the transmitter goes to a low-power, high-impedance state RSVD Reserved. Set to 0 for proper operation. 2.15 Equalizer Gain (EQGAIN): Address 0x12 EQ[4:0] The receive equalizer gain settings are broken down into 20 segments and provided at the five LSBs of this register, EQ4 - EQ0. 00001 corresponds to -2 dB, 10100 corresponds to -40 dB. The three MSBs are don’t cares. 2.16 RAM Address (RAM): Address 0x13 RAM[7:0] The RAM address pointer for the arbitrary waveform memory; a special write procedure must be followed to write the waveform RAM. 2.17 Interrupts An interrupt will occur (INT pulls low) in response to a change in the LOS, AIS or NLOOP bits. The in- terrupt is cleared when the host processor writes a “1” to the respective bit in the control register. Writing a “1” to LOS or NLOOP over the serial in- terface has three effects: 1) The current interrupt on the serial interface will be cleared. (Note that simply reading the register bits will not clear the interrupt). 2) Output data bits 5, 6 and 7 will be reset as ap- propriate. 3) Interrupts for the corresponding LOS and NLOOP will be prevented from occurring. Writing a “0” to either LOS or NLOOP enables the corresponding interrupt for LOS and NLOOP. Reading the registers returns their current status or setting. Register 16 outputs the status NLOOP and LOS and has bits 5, 6, and 7 encoded as shown in Table 4. Writing the arbitrary waveform RAM requires a de- viation from normal serial port access. Register 19 is the RAM address register for the arbitrary wave- form. Two consecutive address bytes are written; first the Address/Command Byte is written to ad- dress 0x13, followed by the address in RAM to be written. This dual address is then followed by the data byte for the waveform amplitude. There are 42 RAM byte locations (numbered h00 to h29). 7 (MSB) 6543 21 0 (LSB) X X X EQ4 EQ3 EQ2 EQ1 EQ0 7 (MSB) 6543 21 0 (LSB) RAM.7 RAM.6 RAM.5 RAM.4 RAM.3 RAM.2 RAM.1 RAM.0 Table4. Register16 Decoding Bits Status 765 0 0 0 Reset has occurred, or no program input 001 RLOOP active 0 1 0 LLOOP active 0 1 1 LOS has changed state since last Clear LOS occurred 100 TAOS active 1 0 1 NLOOP has changed state since last Clear NLOOP occurred 1 1 0 TAOS and LLOOP active 1 1 1 LOS and NLOOP have both changed state since last Clear NLOOP and Clear LOS |
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