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LTC2000 датащи(PDF) 8 Page - Analog Devices

номер детали LTC2000
подробное описание детали  16-/14-/11-Bit 2.5Gsps DACs
PDF  54 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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LTC2000 датащи(HTML) 8 Page - Analog Devices

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LTC2000
8
2000fb
For more information www.linear.com/LTC2000
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. AVDD18, DVDD18 = 1.71V to 1.89V, AVDD33, DVDD33 = 3.135V to 3.465V, SVDD = 1.71V
to 3.465V, RFSADJ = 500Ω, output load 50Ω double terminated, unless otherwise specified.
TIMING CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t1
SDI Valid to SCK Setup
(Note 3)
l
4
ns
t2
SDI Valid to SCK Hold
(Note 3)
l
4
ns
t3
SCK High Time
(Note 3)
l
9
ns
t4
SCK Low Time
(Note 3)
l
9
ns
t5
CS Pulse Width
(Note 3)
l
10
ns
t6
SCK High to CS High
(Note 3)
l
7
ns
t7
CS Low to SCK High
(Note 3)
l
7
ns
t10
CS High to SCK High
(Note 3)
l
7
ns
t13
SCK Low to SDO Valid
Unloaded (Note 3)
l
10
ns
SCK Frequency
50% Duty Cycle (Note 3)
l
50
MHz
t11
LVDS DAP/N, DBP/N to DCKI Setup Time
(Note 3)
DCKI_Q = 1
DCKI_Q = 0, DCKI_TADJ = 000
l
l
200
600
ps
ps
t12
LVDS DAP/N, DBP/N to DCKI Hold Time
(Note 3)
DCKI_Q = 1
DCKI_Q = 0, DCKI_TADJ = 000
l
l
200
–200
ps
ps
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltages are with respect to GND.
Note 3: Guaranteed by design and not production tested.
Note 4: Digital inputs at 0V or SVDD.
Note 5: Latency is the delay from a transition on DCKIP/N until the CKP/N
transition which causes the sample on DAP/N or DBP/N to appear at the
DAC output IOUTP/N, as measured in DAC sample clock (CKP/N) cycles.



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