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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PSOC4100S датащи(PDF) 1 Page - Cypress Semiconductor |
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PSOC4100S датащи(HTML) 1 Page - Cypress Semiconductor |
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1 / 42 page  PSoC® 4: PSoC 4100S Plus Datasheet Programmable System-on-Chip (PSoC) Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 002-19966 Rev. *F Revised February 14, 2018 General Description PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an ARM® Cortex™-M0+ CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. PSoC 4100S Plus is a member of the PSoC 4 platform architecture. It is a combination of a microcontroller with standard communi- cation and timing peripherals, a capacitive touch-sensing system (CapSense) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSoC 4100S Plus products will be upward compatible with members of the PSoC 4 platform for new applications and design needs. Features 32-bit MCU Subsystem ■ 48-MHz ARM Cortex-M0+ CPU ■ Up to 128 KB of flash with Read Accelerator ■ Up to 16 KB of SRAM ■ 8-channel DMA engine Programmable Analog ■ Two opamps with reconfigurable high-drive external and high-bandwidth internal drive and Comparator modes and ADC input buffering capability. Opamps can operate in Deep Sleep low-power mode. ■ 12-bit 1-Msps SAR ADC with differential and single-ended modes, and Channel Sequencer with signal averaging ■ Single-slope 10-bit ADC function provided by a capacitance sensing block ■ Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin ■ Two low-power comparators that operate in Deep Sleep low-power mode Programmable Digital ■ Programmable logic blocks allowing Boolean operations to be performed on port inputs and outputs Low-Power 1.71-V to 5.5-V Operation ■ Deep Sleep mode with operational analog and 2.5- A digital system current Capacitive Sensing ■ Cypress CapSense Sigma-Delta (CSD) provides best-in-class signal-to-noise ratio (SNR) (>5:1) and water tolerance ■ Cypress-supplied software component makes capacitive sensing design easy ■ Automatic hardware tuning (SmartSense™) LCD Drive Capability ■ LCD segment drive capability on GPIOs Serial Communication ■ Five independent run-time reconfigurable Serial Communication Blocks (SCBs) with re-configurable I2C, SPI, or UART functionality Timing and Pulse-Width Modulation ■ Eight 16-bit timer/counter/pulse-width modulator (TCPWM) blocks ■ Center-aligned, Edge, and Pseudo-random modes ■ Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications ■ Quadrature decoder Clock Sources ■ 4 to 33 MHz external crystal oscillator (ECO) ■ PLL to generate 48-MHz frequency ■ 32-kHz Watch Crystal Oscillator (WCO) ■ ±2% Internal Main Oscillator (IMO) ■ 32-kHz Internal Low-power Oscillator (ILO) True Random Number Generator (TRNG) ■ TRNG generates truly random number for secure key gener- ation for Cryptography applications CAN Block ■ CAN 2.0B block with support for Time-Triggered CAN (TTCAN) Up to 54 Programmable GPIO Pins ■ 44-pin TQFP (0.8-mm pitch) and 64-pin TQFP normal (0.8 mm) and Fine Pitch (0.5 mm) packages ■ Any GPIO pin can be CapSense, analog, or digital ■ Drive modes, strengths, and slew rates are programmable PSoC Creator Design Environment ■ Integrated Development Environment (IDE) provides schematic design entry and build (with analog and digital automatic routing) ■ Applications Programming Interface (API) component for all fixed-function and programmable peripherals Industry-Standard Tool Compatibility ■ After schematic entry, development can be done with ARM-based industry-standard development tools |
Аналогичный номер детали - PSOC4100S |
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Аналогичное описание - PSOC4100S |
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ссылки URL |
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