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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ATSAMB11XR датащи(PDF) 15 Page - Microchip Technology |
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ATSAMB11XR датащи(HTML) 15 Page - Microchip Technology |
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15 / 87 page  Figure 5-1. Power-up/Power-down Sequence The timing parameters are provided in following table. Table 5-1. Power-up/Power-down Sequence Timing Parameter Min. Max. Units Description Notes tA 0 ms VBAT rise to VDDIO rise VBAT and VDDIO can rise simultaneously or can be tied together tB 0 VDDIO rise to C_EN rise C_EN must not rise before VDDIO. C_EN must be driven high or low, not left floating. tC 10 µs C_EN rise to 31.25 kHz (2 MHz/64) oscillator stabilizing tB' 0 ms C_EN fall to VDDIO fall C_EN must fall before VDDIO. C_EN must be driven high or low, not left floating. tA' 0 VDDIO fall to VBAT fall VBAT and VDDIO can fall simultaneously or be tied together 5.3 Digital and Mixed-Signal I/O Pin Behavior during Power-Up Sequences The following table represents I/O pin states corresponding to device power modes. ATSAMB11XR/ZR © 2017 Microchip Technology Inc. Datasheet Preliminary DS70005342A-page 15 |
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