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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ATSAMB11XR датащи(PDF) 34 Page - Microchip Technology |
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ATSAMB11XR датащи(HTML) 34 Page - Microchip Technology |
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34 / 87 page  9. External Interfaces 9.1 Overview The ATSAMB11-XR2100A and ATSAMB11-ZR210CA external interfaces include: 2xSPI Master/Slave (SPI0 and SPI1), 2xI2C Master/Slave (I2C0 and I2C1), 1xI2C Slave-only (I2C2), 2xUART (UART1 and UART2), 1xSPI Flash, 1xSWD, and General Purpose Input/Output (GPIO) pins. Table 9-1 illustrates the different peripheral functions that are software selectable for each pin. This allows for maximum flexibility of mapping desired interfaces on GPIO pins. The MUX1 option allows for any MEGAMUX option from Table 9-2 to be assigned to a GPIO. Table 9-1. Pin-MUX Matrix of External Interfaces Pin Name XR Pin # ZR Pin # Pull MUX0 MUX1 MUX2 MUX3 MUX4 MUX5 MUX6 MUX7 LP_GPIO_0 35 12 Up/ Down GPIO 0 MEGAMUX 0 SWD CLK TEST OUT 0 LP_GPIO_1 36 13 Up/ Down GPIO 1 MEGAMUX 1 SWD I/O TEST OUT 1 LP_GPIO_2 37 14 Up/ Down GPIO 2 MEGAMUX 2 UART1 RXD SPI1 SCK SPI0 SCK SPI FLASH SCK TEST OUT 2 LP_GPIO_3 38 15 Up/ Down GPIO 3 MEGAMUX 3 UART1 TXD SPI1 MOSI SPI0 MOSI SPI FLASH TXD TEST OUT 3 LP_GPIO_4 39 16 Up/ Down GPIO 4 MEGAMUX 4 UART1 CTS SPI1 SSN SPI0 SSN SPI FLASH SSN TEST OUT 4 LP_GPIO_5 2 17 Up/ Down GPIO 5 MEGAMUX 5 UART1 RTS SPI1 MISO SPI0 MISO SPI FLASH RXD TEST OUT 5 LP_GPIO_6 3 18 Up/ Down GPIO 6 MEGAMUX 6 UART2 RXD SPI0 SCK SPI FLASH SCK TEST OUT 6 LP_GPIO_7 4 19 Up/ Down GPIO 7 MEGAMUX 7 UART2 TXD SPI0 MOSI SPI FLASH TXD TEST OUT 7 LP_GPIO_8 5 20 Up/ Down GPIO 8 MEGAMUX 8 I2C0 SDA I2C2 SDA SPI0 SSN SPI FLASH SSN TEST OUT 8 ATSAMB11XR/ZR © 2017 Microchip Technology Inc. Datasheet Preliminary DS70005342A-page 34 |
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