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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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P89LPC933FDH датащи(PDF) 36 Page - NXP Semiconductors |
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P89LPC933FDH датащи(HTML) 36 Page - NXP Semiconductors |
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36 / 75 page  9397 750 15113 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 06 — 20 June 2005 36 of 75 Philips Semiconductors P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Capture Noise Filter bit. If set, the capture logic needs to see four consecutive samples of the same value in order to recognize an edge as a capture event. An event counter can be set to delay a capture by a number of capture events. 8.19.6 PWM operation PWM operation has two main modes, symmetrical and asymmetrical. In asymmetrical PWM operation the CCU timer operates in down-counting mode regardless of the direction control bit. In symmetrical mode, the timer counts up/down alternately. The main difference from basic timer operation is the operation of the compare module, which in PWM mode is used for PWM waveform generation. As with basic timer operation, when the PWM (compare) pins are connected to the compare logic, their logic state remains unchanged. However, since bit FCO is used to hold the halt value, only a compare event can change the state of the pin. Fig 10. Asymmetrical PWM, down-counting mode Fig 11. Symmetrical PWM TOR2 compare value timer value non-inverted inverted 0x0000 002aaa893 TOR2 compare value timer value non-inverted inverted 002aaa894 0 |
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