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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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P89LPC933FDH датащи(PDF) 41 Page - NXP Semiconductors |
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P89LPC933FDH датащи(HTML) 41 Page - NXP Semiconductors |
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41 / 75 page  9397 750 15113 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 06 — 20 June 2005 41 of 75 Philips Semiconductors P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core 8.21 I2C-bus serial interface The I2C-bus uses two wires (SDA and SCL) to transfer information between devices connected to the bus, and it has the following features: • Bidirectional data transfer between masters and slaves • Multi master bus (no central master) • Arbitration between simultaneously transmitting masters without corruption of serial data on the bus • Serial clock synchronization allows devices with different bit rates to communicate via one serial bus • Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer • The I2C-bus may be used for test and diagnostic purposes. A typical I2C-bus configuration is shown in Figure 15. The P89LPC933/934/935/936 device provides a byte-oriented I2C-bus interface that supports data transfers up to 400 kHz. Fig 15. I2C-bus configuration OTHER DEVICE WITH I2C-BUS INTERFACE SDA SCL RP RP OTHER DEVICE WITH I2C-BUS INTERFACE P1.3/SDA P1.2/SCL P89LPC935 I2C-bus 002aab082 |
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