P89LPC933FDH datasheet(28/75 Pages) PHILIPS

28 / 75 page

9397 750 15113

Product data sheet

Rev. 06 — 20 June 2005

28 of 75

Philips Semiconductors

P89LPC933/934/935/936

8-bit microcontroller with accelerated two-clock 80C51 core

• CODE

64 kB of code memory space, accessed as part of program execution and via the

MOVC instruction. The P89LPC933/934/935/936 have 4 KB/8 kB/16 kB of on-chip

Code memory.

The P89LPC935/936 also has 512 bytes of on-chip data EEPROM that is accessed via

SFRs (see Section 8.27 “Data EEPROM (P89LPC935/936)”).

8.11 Data RAM arrangement

The 768 bytes of on-chip RAM are organized as shown in Table 7.

8.12 Interrupts

The P89LPC933/934/935/936 uses a four priority level interrupt structure. This allows

great ﬂexibility in controlling the handling of the many interrupt sources. The

P89LPC933/934/935/936 supports 15 interrupt sources: external interrupts 0 and 1,

timers 0 and 1, serial port Tx, serial port Rx, combined serial port Rx/Tx, brownout detect,

watchdog/Real-Time clock, I2C-bus, keyboard, comparators 1 and 2, SPI, CCU, data

EEPROM write/ADC completion.

Each interrupt source can be individually enabled or disabled by setting or clearing a bit in

the interrupt enable registers IEN0 or IEN1. The IEN0 register also contains a global

disable bit, EA, which disables all interrupts.

Each interrupt source can be individually programmed to one of four priority levels by

setting or clearing bits in the interrupt priority registers IP0, IP0H, IP1, and IP1H. An

interrupt service routine in progress can be interrupted by a higher priority interrupt, but

not by another interrupt of the same or lower priority. The highest priority interrupt service

cannot be interrupted by any other interrupt source. If two requests of different priority

levels are pending at the start of an instruction, the request of higher priority level is

serviced.

If requests of the same priority level are pending at the start of an instruction, an internal

polling sequence determines which request is serviced. This is called the arbitration

ranking.

Remark: The arbitration ranking is only used to resolve pending requests of the same

priority level.

8.12.1 External interrupt inputs

The P89LPC933/934/935/936 has two external interrupt inputs as well as the Keypad

Interrupt function. The two interrupt inputs are identical to those present on the standard

80C51 microcontrollers.

Table 7:

On-chip data memory usages

Type

Data RAM

Size (bytes)

DATA

Memory that can be addressed directly and indirectly

128

IDATA

Memory that can be addressed indirectly

256

XDATA

Auxiliary (‘External Data’) on-chip memory that is accessed

using the MOVX instructions (P89LPC935/936)

512

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