P89LPC933FDH datasheet(35/75 Pages) PHILIPS

35 / 75 page

9397 750 15113

Product data sheet

Rev. 06 — 20 June 2005

35 of 75

Philips Semiconductors

P89LPC933/934/935/936

8-bit microcontroller with accelerated two-clock 80C51 core

being used as the CPU clock. If the XTAL oscillator is used as the CPU clock, then the

RTC will use CCLK as its clock source. Only power-on reset will reset the RTC and its

associated SFRs to the default state.

8.19 CCU (P89LPC935/936)

This unit features:

• A 16-bit timer with 16-bit reload on overﬂow.

• Selectable clock, with prescaler to divide clock source by any integral number

between 1 and 1024.

• Four compare/PWM outputs with selectable polarity.

• Symmetrical/asymmetrical PWM selection.

• Two capture inputs with event counter and digital noise rejection ﬁlter.

• Seven interrupts with common interrupt vector (one overﬂow, two capture,

four compare).

• Safe 16-bit read/write via shadow registers.

8.19.1 CCU clock

The CCU runs on the CCUCLK, which is either PCLK in basic timer mode, or the output of

a Phase-Locked Loop (PLL). The PLL is designed to use a clock source between 0.5 MHz

to 1 MHz that is multiplied by 32 to produce a CCUCLK between 16 MHz and 32 MHz in

PWM mode (asymmetrical or symmetrical). The PLL contains a 4-bit divider to help divide

PCLK into a frequency between 0.5 MHz and 1 MHz.

8.19.2 CCUCLK prescaling

This CCUCLK can further be divided down by a prescaler. The prescaler is implemented

as a 10-bit free-running counter with programmable reload at overﬂow.

8.19.3 Basic timer operation

The timer is a free-running up/down counter with a direction control bit. If the timer

counting direction is changed while the counter is running, the count sequence will be

reversed. The timer can be written or read at any time.

When a reload occurs, the CCU Timer Overﬂow Interrupt Flag will be set, and an interrupt

generated if enabled. The 16-bit CCU timer may also be used as an 8-bit up/down timer.

8.19.4 Output compare

There are four output compare channels A, B, C and D. Each output compare channel

needs to be enabled in order to operate and the user will have to set the associated I/O

pin to the desired output mode to connect the pin. When the contents of the timer matches

that of a capture compare control register, the Timer Output Compare Interrupt Flag

(TOCFx) becomes set. An interrupt will occur if enabled.

8.19.5 Input capture

Input capture is always enabled. Each time a capture event occurs on one of the two input

capture pins, the contents of the timer is transferred to the corresponding 16-bit input

capture register. The capture event can be programmed to be either rising or falling edge

triggered. A simple noise ﬁlter can be enabled on the input capture by enabling the Input

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