IC-HTP datasheet(44/51 Pages) ICHAUS

44 / 51 page

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iC-HTP

DUAL CW P-TYPE LASER DIODE DRIVER

Rev B1, Page 44/51

OVC2

Addr. 0x00; bit 4

No overcurrent event at channel 2 has occurred

since last read

Overcurrent event at channel 2 has occurred.

Cleared on read

Table 91: Overcurrent channel 2

OVC1

Addr. 0x00; bit 5

No overcurrent event at channel 1 has occurred

since last read

Overcurrent event at channel 1 has occurred.

Cleared on read

Table 92: Overcurrent channel 1

OSCERR

Addr. 0x00; bit 6

Oscillator functioning OK

Watchdog timeout set on oscillator failure.

Cleared on read

Table 93: Oscillator watchdog

CFGTIMO

Addr. 0x00; bit 7

iC-HTP not in Configuration Mode or Timeout did not

happened till now

iC-HTP in Configuration Mode and Timeout

happened. Laser switched off

Table 94: Configuration timeout

MAPC1

Addr. 0x01; bit 0

EC1 is 0 at the precise reading moment

EC1 is 1 at the precise reading moment

Table 95: EC1 pin state

MONC1

Addr. 0x01; bit 1

EC1 has not been set to 1 since last read

EC1 has been set to 1 at least once. Cleared on

read

Table 96: Monitor channel 1

LDASAT1

Addr. 0x01; bit 2

Channel 1 LDA saturation voltage not reached

Channel 1 LDA saturation voltage reached at least

once, cleared on read

Table 97: LDA1 saturation

PDOVBL1

Addr. 0x01; bit 3

VBL1 power down not occurred since last read. If

MERGE = 1, VBL1 voltage level equals VBL2

voltage level

VBL1 power down event has occurred. If MERGE =

1, VBL1 voltage level not equals VBL2 voltage level.

Cleared on read

Table 98: VBL1 power down

MAPC2

Addr. 0x01; bit 4

EC2 is 0 at the precise reading moment

EC2 is 1 at the precise reading moment

Table 99: EC2 pin state

MONC2

Addr. 0x01; bit 5

EC2 has not been set to 1 since last read

EC2 has been set to 1 at least once. Cleared on

read

Table 100: Monitor channel 2

LDASAT2

Addr. 0x01; bit 6

Channel 2 LDA saturation voltage not reached.

Channel 2 LDA saturation voltage reached at least

once. Cleared on read

Table 101: LDA2 saturation

PDOVBL2

Addr. 0x01; bit 7

VBL2 power down not occurred since last read. If

MERGE = 1, VBL1 and VBL2 had no power down

since last read

VBL2 power down event has occurred. If MERGE =

1, VBL1 or VBL2 had a power down event. Cleared

on read

Table 102: VBL2 power down

TEMP

Addr. 0x02; bit 7:0

0x00

Minimum temperature

0xFF

Maximum temperature

Table 103: Chip temperature

ADC1

Addr. 0x03/04; bit 9:0

0x000

ADC minimum value

0x3FF

ADC maximum value

Table 104: ADC channel 1

ADC2

Addr. 0x05/06; bit 9:0

0x000

ADC minimum value

0x3FF

ADC maximum value

Table 105: ADC channel 2

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