IC-HTP datasheet(28/51 Pages) ICHAUS

28 / 51 page

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iC-HTP

DUAL CW P-TYPE LASER DIODE DRIVER

Rev B1, Page 28/51

8 BIT INTERNAL PROGRAMMABLE LOGARITHMIC MONITOR RESISTORS

In MCU mode internal 8 bit programmable logarithmic

monitor resistors (PLRx) are provided for APC.

The resistor value can be selected from 256 values,

ranging from 100 Ω to 407 kΩ, following logarithmic in-

crements with a typical step width of 3.3%. The resis-

tors are configured with registers RMDx(7:0).

RMD1

Addr. 0x12; bit 7:0

R/W 0xFF

0x00

PLR1 set to the minimum resistance

. . .

PLR1 resistor set to Rmd = Rmd0(1 +

∆

Rmd(%)

100

)n+1,

n from 0 to 255

0xFF

PLR1 resistor set to the maximum resistance

Table 57: MDK resistor channel 1

RMD2

Addr. 0x17; bit 7:0

R/W 0xFF

0x00

PLR2 resistor set to the minimum resistance

. . .

PLR2 resistor set to Rmd = Rmd0(1 +

∆

Rmd(%)

100

)n+1,

n from 0 to 255

0xFF

PLR2 resistor set to the maximum resistance

Table 58: MDK resistor channel 2

The following formula calculates the register RMDx in

order to set the desired resistor value:

Rmd = Rmd0(1 +

∆

Rmd(%)

100

)n+1, n from 0 to 255

Where Rmd0 is the minimum resistor value (typically

100 Ω), ∆ Rmd(%) is the step between two consecutive

resistor values (typically 3.3%) and n is the value of

RMDx register in decimal.

In APC mode the regulation node is the internal con-

nection to PLR, it is not MDAx pin. Voltage present at

pin MDKx may differ from the internal regulation node

(see detail in Figure 15). This regulation node can be

sensed through the 10 bit A/D converter and read at

for this purpose. If ADFNSx is set to 1, MDKx pin will

be the input of the A/D converter.

RC14

RC13

iC-HTP

RC15

RC0

RF0

RF15

100Ω

RF1

RF13

RF14

MDKx

VDD

MRHx

Figure 15: PLR internal node regulation

At pin MDKx only the 4 MSB of the RMDx configuration

from PLRx are measurable. The 8 bits of the PLRx

configuration RMDx can be measured with the A/D

converter setting ADFNSx to 0.

The PLRx can be disabled using register bit DISPx.

With DISPx = 0 the PLRx is enabled and DISPx = 1

disables the PLRx.

DISP1

Addr. 0x10; bit 2

R/W 0

PLR enabled for channel 1

PLR disabled for channel 1

Table 59: Disable PLR channel 1

DISP2

Addr. 0x15; bit 2

R/W 0

PLR enabled for channel 2

PLR disabled for channel 2

Table 60: Disable PLR channel 2

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