IC-HTP datasheet(38/51 Pages) ICHAUS

38 / 51 page

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iC-HTP

DUAL CW P-TYPE LASER DIODE DRIVER

Rev B1, Page 38/51

DIGITAL INTERFACE AND MEMORY INTEGRITY MONITOR

iC-HTP provides a microcontroller slave interface by se-

lection on the EMC pin. iC-HTP support the interfaces

SPI or I2C that are selected by the INS/WKR pin.

EMC

Addr. Pin;

iC-WK-mode, digital interfaces disabled

Open

Not allowed, error signaled

MCU mode, interface selected by INS/WKR enabled

Table 79: Enable microcontroller

INS/WKR

Addr. Pin;

SPI interface selected

Open

Not allowed, error signaled.

I2C interface selected

Table 80: Interface selection I2C or SPI

The configuration memory is integrity monitored and

atomic executable (all at once: changes of the con-

figurations without any direct effects, the changes are

executed at once by command ) to the functional blocks

of iC-HTP.

Integrity monitoring is implemented by a duplication of

the configuration registers into a validation page (see

description below) where the register are automatically

copied with inverted value. Every register bit is com-

pared with its validation copy and in case of difference,

a memory error is generated and both laser channels

are switched off.

Atomic appliance is achieved by latching the configura-

tion registers. This permits a full configuration (different

registers) to be made prior to apply it to the laser chan-

nels. iC-HTP has two different modes selectable by the

MODE(1:0) register (addr. 0x1C).

MODE(1:0)

Addr. 0x1C; bit 1:0

R/W 01

Not allowed

Chip set in operation mode

(apply configuration, latch transparent)

Chip set in configuration mode

(hold previous configuration)

Not allowed

Table 81: Configuration and operation mode

In Configuration mode, the configuration memory

(addr. 0x10 to 0x1F) can be written and read back

to check a correct communication without changing the

present configured operation state of the iC-HTP. In this

mode, the memory integrity check is disabled.

iC-HTP will monitor the time elapsed in configuration

mode and automatically switch the laser off if it exceeds

a configuration mode timeout. The time in configura-

tion mode must be less than 40 ms for ensuring that

no configuration timeout occurs during configuration (cf.

Electrical Characteristics No. E02). The timeout can be

up to 164 ms.

When writing the configuration is completed, iC-HTP is

switched to operation mode by writing "0b01" into the

MODE register (addr. 0x1C). In operation mode the

configuration is applied to the iC-HTP and the memory

integrity check activated. In this mode configuration

registers can only be read (except MODE(1:0) regis-

ter, which is always accessible). Figure 22 shows the

interface to memory structure.

RNW

RNW_RAM

MEMERR

LATCH

CFG(127:0)

CHECK

ERROR

DB(7:0)

RAM

Addr.

Decoder

RNW_VAL

VALIDATION

SPI / I2C

Addr. 0x1C

0x10

0x1F

MODE

0x30

0x3F

ADR(6:0)

Figure 22: Interface, RAM integrity monitoring and configuration latching

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