IC-GD datasheet(45/55 Pages) ICHAUS

45 / 55 page

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iC-GD

UNIVERSAL I/O INTERFACE

Rev A1, Page 45/55

IO_SEL_xP

LK - P

RW - 011

000

DI – digital input

001

DO – digital output

010

VI – voltage input

011

VO – voltage output

100

CI – current input

101

CO – current output

110

CNT – counter, corresponds to DI when counting

and DO for PWM

111

TM – temperature mesurement

Table 40: Primary channel mode selection

IO_SEL_xS

LK - S

(*) RW - 000

000

DI – digital input

001

DO – digital output

010

VI – voltage input

011

VO – voltage output

100

CI – current input

101

CO – current output

110

CNT(PWM) – counter in PWM mode, corresponds to

DO; counter not supported

111

OFF – NOP

Table 41: Secondary channel mode selection

DO_12

The register DO_12 enables outputting a digital data

signal for both channels. For control, any source of

the first channel can be used. The output occurs simul-

taneously at both outputs. If the signals are output in

phase (i.e. DIO_INV_1 = DIO_INV_2), the outputs can

be connected in parallel and the maximum available

current can thus be doubled. The antivalent operation

for example is useful for differential mode generation

via PWM.

DO_12

LK - P

RW - 0

Activates the output of a signal via DO_1 and DO_2

Table 42: DO_12

DO_ADR0_2

value at pin ADR0 directly at the digital output pin IA2.

The possibility for inversion remains.

DO_ADR0_2

LK - P

RW - 0

Activates pin ADR0 → IA2

Table 43: DO_ADR0_2

ENVIF_x

when using the current and voltage input as well as

thermocouples. If this bit is set, the pin UIx is switched

to ground by means of a resistor.

ENVIF_x

LK-PS

RW - 0

Switches pin UI to ground – use with floating sensors

Table 44: ENVIF_x

DI_SEL_x

as type 1/2/3 in accordance with the standard DIN/EN

61131-2.

DI_SEL_x

LK-PS

RW - 11

Pull-up

Type 1

Type 2

Type 3

Table 45: Digital input selection

DO_SEL_x

digital output. In push-pull mode, either the P-channel

or the N-channel transistor is active to pull the output

actively to the appropriate level. In low-side mode,

only the N-channel transistor and a small pull-down cur-

rent-source for cable break detection are active. Cor-

respondingly, in high-side mode, only the P-channel

transistor and a small pull-up current are active.

DO_SEL_x

LK-PS

RW - 00

Push-pull

IO-Link with push-pull

Low-side driver

High-side driver

Table 46: Digital input/output selection

DIO_INV_x

The input and output signals can be inverted with the

DIO_INV_x register. At the input, all modes are affected

that use the digital input, i.e. also counters and the read-

-back of the physical line level. At the output, all modes

are affected that use the digital output, i.e. the counter

in PWM mode.

DIO_INV_x

LK-PS

RW - 0

OFF – input/output not inverted

ON – input/output inverted

Table 47: Digital input/output inversion

SYNC_SEL_x

According to table 48, both SYNC pins can be operated

separately in the following modes. Note that for modes

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