IC-GD datasheet(41/55 Pages) ICHAUS

41 / 55 page

prel

imin

ary

prel

imin

ary

iC-GD

UNIVERSAL I/O INTERFACE

Rev A1, Page 41/55

CH_STAT_x (DO / CNT(PWM))

R+RST -

0000000

bit 0

1 = Cable break (*)

bit 1

1 = Channel overtemperature (***)

bit 2

1 = Overcurrent IAx (**)

bit 6

1 = Overcurrent UNx

Table 32: CH_STAT_x in DO/PWM mode

(*) Cable break detection is based on the pull-

up/pull-down currents according to Item No. B04/B12.

A cable break will only be detected when the driver is

inactive and the connected load cannot pull away the

current, i.e. in the following operating conditions:

1) Low-side driver configured and switched off (i.e. out-

put at ’1’).

2) High-side driver configured and switched off (i.e. out-

put at ’0’).

The identification has a dead time of td(),ol, to also

enable high-resistance loads to discharge the line.

(**) The status bit for overcurrent is activated when an

active driver cannot saturate anymore. This condition

can be long-lasting, provided that the overtemperature

monitoring remains inactive.

(***) The channel overtemperature, as defined in

overtemperature behavior, switches off the digital driver.

When the restart temperature is underrun, the driver is

activated automatically. Therefore the driver oscillates

with a thermal time-constant.

CH_STAT_x (VI/CI/TM(TE))

R+RST -

0000000

bit 0

1 = lower range underrun

bit 1

1 = upper range overrun

bit 2

1 = lower limit underrun

bit 3

1 = upper limit overrun

bit 4

1 = cable break UPx/current underrun (CI at

4...20 mA only)

bit 5

1 = cable break UIx

bit 6

1 = overcurrent UNx

Table 33: CH_STAT_x in mode VI/CI/TE

(*) The current underrun is only active during current

measurement operation with a configured 4 to 20 mA

range and monitors the digital value for falling below

0xFD00 ˆ= 3.602 mA.

CH_STAT_x (TM(PT))

R+RST -

0000000

bit 0

1 = lower range underrun

bit 1

1 = upper range overrun

bit 2

1 = lower limit underrun

bit 3

1 = upper limit overrun

bit 4

1 = cable break UPx (4-wire only)/cable break IA

(2/3/4-wire)

bit 5

1 = cable break UIx (3/4-wire only)

bit 6

1 = overcurrent UNx

Table 34: CH_STAT_x in mode TM(PT)

CH_STAT_x (VO)

R+RST -

0000000

bit 0

1 = overcurrent UPx (pin higher than nominal)

bit 1

1 = overcurrent UPx (pin lower than nominal)

bit 6

1 = overcurrent UNx

Table 35: CH_STAT_x in mode VO

CH_STAT_x (CO)

R+RST -

0000000

bit 0

1 = cable break/R_load(*) IAx

bit 6

1 = overcurrent UNx

Table 36: CH_STAT_x in mode CO

(*) This bit is set if the cable at the relevant pin is bro-

ken or the combination of load resistance and current

prevents the driver from saturatiing.

CH_STAT_x (CNT except PWM)

R+RST -

0000000

bit 0

Mapping of digital input to spike filter and optional

inversion (*)

bit 1

1 = counter underrun

bit 2

1 = counter overrun

bit 4

1 = counter reached reference value

bit 5

1 = counter reached reference value #2 (CH_1 only,

see bit CNT_E2R)

bit 6

1 = overcurrent UNx

Table 37: CH_STAT_x in mode CNT

(*) When bit ENDOSC_x is activated, the output of

the comparator that is also available for the counter is

mapped instead.

IRQ_FLAG_REG

The register IRQ_FLAG_REG is controlled directly via

the opcode and therefore does not contain a register

address.

The bits of the CH_STAT_REG register that were acti-

vated via EN_IRQ_FLAG_REG are mapped to this reg-

ister. IRQ_FLAG_REG is no register as such. It is gen-

IC-GD датащи(PDF) 41 Page - IC-Haus GmbH

IC-GD датащи(HTML) 41 Page - IC-Haus GmbH

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

датащи скачать

ссылки URL