IC-GD datasheet(28/55 Pages) ICHAUS

28 / 55 page

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iC-GD

UNIVERSAL I/O INTERFACE

Rev A1, Page 28/55

Case 1:

AOSZn ≥ 0,

AOSZn ≥ c1 ∗

f meas

f set

−

AOSZn+1 = AOSZn ∗

f set

f meas

+ c1 ∗

f set

f meas

−

Case 2:

AOSZn ≥ 0,

AOSZn < c1 ∗

f meas

f set

−

AOSZn+1 =



1 −

f meas

f set

∗

1 + AOSZn



 ∗ c2

Case 3:

AOSZn < 0,

AOSZn ≥ c2 ∗ 1 −

f set

f meas

AOSZn+1 =





f set

f meas

∗

1 − AOSZn

−



 ∗ c1

Case 4:

AOSZn < 0,

AOSZn < c2 ∗ 1 −

f set

f meas

AOSZn+1 = AOSZn ∗

f meas

f set

+ c2 ∗ 1 −

f meas

f set

with

c1 = 192,

c2 = 180

AOV – Voltage output offset

The output voltage offset calibration, UPx − UNx, is

done for both channels via the 3-bit register AOV.

The calibration range covers approx. 9 mV in steps

of 1.28 mV.

With AOV = 0b000 at channel 1, a voltage of 0 mV

(0x0000) is output and the (negative) offset is deter-

mined. The calibration value AOV then results in:

AOV = −

Vmeas

1.28 mV

AGVsx – Voltage output gain

The output voltage gain calibration, UPx − UNx, is

centrally carried out via the internal 5.25 V voltage ref-

erence of the 14-bit D/A converter. The calibration

range based on the output voltage of ±10.5 V is approx.

512 mV in steps of approx. 1 mV.

For this, a previous calibration of the offset (AOV) is

required.

The

four

calibration

values

AGVPx(8:0)

and

AGVNx(8:0) must be calculated for both channels and

separately for the positive and negative output range.

For start value AGVsx0 = 0x100 and the maximum

magnitude of voltage Vset must be performed:

AGVsxn+1 = AGVsxn ∗

Vmeas

Vset

+29 ∗19.2∗

Vmeas

Vset

−

AOIAx – Current output offset

The current output offset applies to the 4 to 20 mA range

only. The calibration range is approx. 0.25 mA. The

calibration steps are approx. 1 µA.

The calibration is performed with IAx at 4 mA (0x0000)

via AOIAx(7:0). For this, two iterations according to the

following equation with the start value AOIAx0 = 0x80

are performed:

AOIAxn+1 = AOIAxn ∗

Imeas

Iset

+ 28 ∗ 15.5 ∗

Imeas

Iset

−

AGIAmx – Current output gain

The calibration range for the current output gain is ap-

prox. 6.1% (minus offset of the 4 to 20 mA range). The

calibration steps are 1/256 (i.e. e.g. selected in the 0

to 20 mA range with 21 mA: calibration range approx.

1.28 mA, calibration steps approx. 5 µA).

For the calibration of the current output gain, a previous

calibration of the current output offset (AOIAx, only in

the range of 4 to 20 mA) is required.

The output current calibration at IAx is carried out for

both output ranges of 0 to 20 mA as gain of the fullscale

value of approx. 21 mA (0xFFC) via AGIAAx(7:0) or

AGIABx(7:0).

For the ranges 0 to 2 mA or 0 to 200 µA, that are primar-

ily intended for the PT100 or PT1000 measurement, the

gain is calculated at 1.7 mA or 170 µA (both 0xCF3C)

via AGIACx(7:0) or AGIADx(7:0). This value is used for

energizing the PT elements and is stored on the chip.

The calibration is made with in each case 2 iterations

according to the following equation with the start value

AGIAmx0 = 0x80:

AGIAmxn+1 = AGIAmxn ∗

Imeas−Ioffset

Iset−Ioffset

+28 ∗ 16.6 ∗

Imeas−Ioffset

Iset−Ioffset

−

AGFnx, AOFnx

The current/voltage measurement calibration is made

for the different measuring ranges by setting the offset

(AOFnx) and the gain (AGFnx). Required is a previous

successful calibration of the voltage outputs.

At AGFnx = 0xC000 and AOFnx = 0x000, several volt-

age/current values are externally applied (Xset) and

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