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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HT45F4MA датащи(PDF) 71 Page - Holtek Semiconductor Inc |
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HT45F4MA датащи(HTML) 71 Page - Holtek Semiconductor Inc |
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71 / 145 page  Rev. 1.20 70 De�e��e� 1�� 201� Rev. 1.20 71 De�e��e� 1�� 201� HT45F4MA/HT45FH4MA/HT45FH4MA-1 Power Bank Flash MCU HT45F4MA/HT45FH4MA/HT45FH4MA-1 Power Bank Flash MCU Timer/Counter Mode Toselectthismode,bitsT0M1andT0M0intheTM0C1registershouldbesetto11respectively. TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutputMode generatingthesameinterruptflags.TheexceptionisthatintheTimer/CounterModetheTMoutput pinisnotused.ThereforetheabovedescriptionandTimingDiagramsfortheCompareMatch OutputModecanbeusedtounderstanditsfunction.AstheTMoutputpinisnotusedinthismode, thepincanbeusedasanormalI/Opinorotherpin-sharedfunction. PWM Output Mode Toselectthismode,bitsT0M1andT0M0intheTM0C1registershouldbesetto10respectivelyand alsotheT0IO1andT0IO0bitsshouldbesetto10respectively.ThePWMfunctionwithintheTMis usefulforapplicationswhichrequirefunctionssuchasmotorcontrol,heatingcontrol,illumination controletc.ByprovidingasignaloffixedfrequencybutofvaryingdutycycleontheTMoutputpin,a squarewaveACwaveformcanbegeneratedwithvaryingequivalentDCRMSvalues. AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated waveformisextremelyflexible.InthePWMmode,theT0CCLRbithasnoeffectasthePWM period.BothoftheCCRAandCCRPregistersareusedtogeneratethePWMwaveform,oneregister isusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency,whiletheother oneisusedtocontrolthedutycycle.Whichregisterisusedtocontroleitherfrequencyordutycycle isdeterminedusingtheT0DPXbitintheTM0C1register. ThePWMwaveformfrequencyanddutycyclecanthereforebecontrolledbythevaluesinthe CCRAandCCRPregisters.Aninterruptflag,oneforeachoftheCCRAandCCRP,willbe generatedwhenacomparematchoccursfromeitherComparatorAorComparatorP.TheT0OCbit IntheTM0C1registerisusedtoselecttherequiredpolarityofthePWMwaveformwhilethetwo T0IO1andT0IO0bitsareusedtoenablethePWMoutputortoforcetheTMoutputpintoafixed highorlowlevel.TheT0POLbitisusedtoreversethepolarityofthePWMoutputwaveform. • 16-bit STM, PWM Mode, Edge-aligned Mode, T0DPX=0 CCRP 1~255 0 Pe�iod CCRP×25� �553� Duty CCRA IffSYS=7.5MHz,TMclocksourceisfSYS/4,CCRP=2andCCRA=128, TheSTMPWMoutputfrequency=(fSYS/4)/512=fSYS/2048=3.66kHz,duty=128/512=25%. IftheDutyvaluedefinedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe PWMoutputdutyis100%. • 16-bit STM, PWM Mode, Edge-aligned Mode, T0DPX=1 CCRP 1~255 0 Pe�iod CCRA Duty CCRP×25� �553� ThePWMoutputperiodisdeterminedbytheCCRAregistervaluetogetherwiththeTMclock whilethePWMdutycycleisdefinedbythe(CCRP×256)exceptwhentheCCRPvalueisequalto0. |
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