| поискавой системы для электроныых деталей |
|
T48C862x-Rf-TNQ датащи(PDF) 56 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
T48C862x-Rf-TNQ датащи(HTML) 56 Page - ATMEL Corporation |
|
56 / 107 page ![]() 56 T48C862-R4 [Preliminary] 4551C–4BMCU–01/04 Figure 51. Counter 3 Stage The status of the timer as well as the occurrence of a compare match or an edge detect of the input signal is indicated by the status register T2ST. This allows identification of the interrupt source because all these events share only one timer interrupt. Timer 3 compares data values. The Timer 3 has two 8-bit compare registers (T3CO1, T3CO2). The compare data value can be ‘m’ for each of the Timer 3 compare registers. The compare data value for the compare registers is: m = x +1 0 ≤x ≤255 Timer 3 – Mode 1: Timer/Counter The selected clock from an internal or external source increments the 8-bit counter. In this mode, the timer can be used as event counter for external clocks at T3I or as timer for generating interrupts and pulses at T3O. The counter value can be read by the soft- ware via the capture register. 8-bit comparator Compare register 1 RES Capture register 8-bit counter Compare register 2 Control C31 C32 Control T3SM1 NQ D T3RM1 T3IM1 T3TM1 TOG2 T3I T3TM2 T3IM2 T3RM2 T3SM2 NQ D CL3 T3EIM TOG3 INT5 CM31 CM32 : T3M1 : T3M2 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |