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T48C862x-Rf-TNQ датащи(PDF) 75 Page - ATMEL Corporation |
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T48C862x-Rf-TNQ датащи(HTML) 75 Page - ATMEL Corporation |
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75 / 107 page ![]() 75 T48C862-R4 [Preliminary] 4551C–4BMCU–01/04 Serial Interface Registers Serial Interface Control Register 1 (SIC1) Auxiliary register address: "9"hex Note: This bit has to be set to "1" during the MCL mode and the Timer 3 mode 10 or 11 Note: with SCD = 0 the bits SCS1 and SCS0 are insignificant Table 24. Serial Clock Source Select Bits • In transmit mode (SDD = 1) shifting starts only if the transmit buffer has been loaded (SRDY = 1). • Setting SIR bit loads the contents of the shift register into the receive buffer (synchronous 8-bit mode only). • In MCL modes, writing a 0 to SIR generates a start condition and writing a 1 generates a stop condition. Bit 3Bit 2Bit 1Bit 0 SIR SCD SCS1 SCS0 Reset value: 1111b SIR S erial Interface Reset SIR = 1, SSI inactive SIR = 0, SSI active SCD S erial Clock Direction SCD = 1, SC line used as output SCD = 0, SC line used as input SCS1 S erial Clock source Select bit 1 SCS0 S erial Clock source Select bit 0 SCS1 SCS0 Internal Clock for SSI 1 1 SYSCL/2 10 T1OUT/2 01 POUT/2 0 0 TOG2/2 |
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