T48C862x-Rf-TNQ datasheet(22/107 Pages) ATMEL

22 / 107 page

T48C862-R4 [Preliminary]

4551C–4BMCU–01/04

A power-on reset pulse is generated by a V

DD rise across the default BOT voltage level

(1.7 V). A brown-out reset pulse is generated when V

DD falls below the brown-out volt-

age threshold. Two values for the brown-out voltage threshold are programmable via

the BOT bit in the SC register. When the controller runs in the upper supply voltage

range with a high system clock frequency, the high threshold must be used. When it

runs with a lower system clock frequency, the low threshold and a wider supply voltage

range may be chosen. For further details, see the electrical specification and the

SC register description for BOT programming.

Figure 16.

Brown-out Detection

Watchdog Reset

The watchdog’s function can be enabled at the WDC register and triggers a reset with

every watchdog counter overflow. To suppress the watchdog reset, the watchdog

counter must be regularly reset by reading the watchdog register address (CWD). The

CPU reacts in exactly the same manner as a reset stimulus from any of the above

sources.

External Clock Supervisor

The external input clock supervisor function can be enabled if the external input clock is

selected within the CM and SC registers of the clock module. The CPU reacts in exactly

the same manner as a reset stimulus from any of the above sources.

Voltage Monitor

The voltage monitor consists of a comparator with internal voltage reference. It is used

to supervise the supply voltage or an external voltage at the VMI pin. The comparator for

the supply voltage has three internal programmable thresholds one lower threshold (2.2

V), one middle threshold (2.6 V) and one higher threshold (3.0 V). For external voltages

at the VMI pin, the comparator threshold is set to V

BG = 1.3 V. The VMS bit indicates if

the supervised voltage is below (VMS = 0) or above (VMS = 1) this threshold. An inter-

rupt can be generated when the VMS bit is set or reset to detect a rising or falling slope.

A voltage monitor interrupt (INT7) is enabled when the interrupt mask bit (VIM) is reset

in the VMC register.

CPU

Reset

BOT = '1'

2.0 V

1.7 V

CPU

Reset

BOT = '0'

= 1.5 ms (typically)

BOT = 1, low brown-out voltage threshold 1.7 V (is reset value).

BOT = 0, high brown-out voltage threshold 2.0 V.

T48C862x-Rf-TNQ датащи(PDF) 22 Page - ATMEL Corporation

T48C862x-Rf-TNQ датащи(HTML) 22 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL