T48C862x-Rf-TNQ datasheet(25/107 Pages) ATMEL

25 / 107 page

T48C862-R4 [Preliminary]

4551C–4BMCU–01/04

Figure 20.

Clock Module

Table 4.

Clock Modes

The clock module generates two output clocks. One is the system clock (SYSCL) and

the other the periphery (SUBCL). The SYSCL can supply the core and the peripherals

and the SUBCL can supply only the peripherals with clocks. The modes for clock

sources are programmable with the OS1 bit and OS0 bit in the SC register and the

CCS bit in the CM register.

Oscillator Circuits and

External Clock Input

Stage

The microcontroller block series consists of four different internal oscillators: two RC-

oscillators, one 4-MHz crystal oscillator, one 32-kHz crystal oscillator and one external

clock input stage.

RC-oscillator 1

Fully Integrated

For timing insensitive applications, it is possible to use the fully integrated RC

oscillator 1. It operates without any external components and saves additional costs.

The RC-oscillator 1 center frequency tolerance is better than ±50% over the full temper-

ature and voltage range. The basic center frequency of the RC-oscillator 1 is

O ≈

3.8 MHz. The RC oscillator 1 is selected by default after power-on reset.

Mode

OS1

OS0

Clock Source for SYSCL

Clock Source

for SUBCL

CCS = 1

CCS = 0

RC-oscillator 1 (internal)

External input clock

Cin/16

RC-oscillator 1 (internal)

RC-oscillator 2 with

external trimming

resistor

in/16

RC-oscillator 1 (internal)

4-MHz oscillator

in/16

RC-oscillator 1 (internal)

32-kHz oscillator

32 kHz

Ext. clock

ExI

ExOu

Stop

RC oscillator2

RCOut2

Stop

Trim

4-MHz oscillator

4Out

Stop

Osci

Oscou

Osci

Oscou

32-kHz oscillator

32Out

Osci

Oscou

oscillator 1

RCOut1

Control

Stop

IN1

IN2

Cin

Divide

Sleep

WDL

Osc-

Stop

NSTOP

CCS

CSS1

CSS0

CM:

BOT

- - -

OS1

OS0

SUBCL

SYSCL

SC:

OSC1

OSC2

Configurable

Cin/16

kHz

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