T48C862x-Rf-TNQ datasheet(71/107 Pages) ATMEL

71 / 107 page

T48C862-R4 [Preliminary]

4551C–4BMCU–01/04

9-bit Shift Mode (MCL)

In the 9-bit shift mode, the SSI is able to handle the MCL protocol (described below). It

always operates as an MCL master device, i.e., SC is always generated and output by

the SSI. Both the MCL start and stop conditions are automatically generated whenever

the SSI is activated or deactivated by the SIR bit. In accordance with the MCL protocol,

the output data is always changed in the clock low phase and shifted in on the high

phase.

Before activating the SSI (SIR = 0) and commencing an MCL dialog, the appropriate

data direction for the first word must be set using the SDD control bit. The state of this

bit controls the direction of the data port (BP43 or MCL_SD). Once started, the 8 data

bits are, depending on the selected direction, either clocked into or out of the shift regis-

ter. During the 9th clock period, the port direction is automatically switched over so that

the corresponding acknowledge bit can be shifted out or read in. In transmit mode, the

acknowledge bit received from the device is captured in the SSI Status Register (TACK)

where it can be read by the controller. In receive mode, the state of the acknowledge bit

to be returned to the device is predetermined by the SSI Status Register (RACK).

Changing the directional mode (TX/RX) should not be performed during the transfer of

an MCL telegram. One should wait until the end of the telegram which can be detected

using the SSI interrupt (IFN =1) or by interrogating the ACT status.

Once started, a 9-bit telegram will always run to completion and will not be prematurely

terminated by the SIR bit. So, if the SIR bit is set to ‘1’ in telegram, the SSI will complete

the current transfer and terminate the dialog with an MCL stop condition.

Figure 68.

Example of MCL Transmit Dialog

7 6 54 32 1

765432 10 A

msb

lsb

tx data 1

tx data 2

msb

lsb

Write STB

(tx data 1)

SRDY

ACT

Interrupt

(IFN = 0)

Interrupt

(IFN = 1)

Write STB

(tx data 2)

SIR

SDD

Start

Stop

T48C862x-Rf-TNQ датащи(PDF) 71 Page - ATMEL Corporation

T48C862x-Rf-TNQ датащи(HTML) 71 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL