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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST72344K2 датащи(PDF) 128 Page - STMicroelectronics |
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ST72344K2 датащи(HTML) 128 Page - STMicroelectronics |
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128 / 247 page  On-chip peripherals ST72344xx, ST2345xx 128/247 Doc ID 12321 Rev 6 SPI data I/O register (SPIDR) Reset value: Undefined The SPIDR register is used to transmit and receive data on the serial bus. In a master device, a write to this register will initiate transmission/reception of another byte. Note: During the last clock cycle the SPIF bit is set, a copy of the received data byte in the shift register is moved to a buffer. When the user reads the serial peripheral data I/O register, the buffer is actually being read. While the SPIF bit is set, all writes to the SPIDR register are inhibited until the SPICSR register is read. Warning: A write to the SPIDR register places data directly into the shift register for transmission. A read to the SPIDR register returns the value located in the buffer and not the content of the shift register (see Figure 56). 7 0 D7 D6 D5 D4 D3 D2 D1 D0 Read/Write Table 55. SPI register map and reset values Address (Hex.) Register label 7 6543 210 0021h SPIDR Reset value MSB xxx x xxx LSB x 0022h SPICR Reset value SPIE 0 SPE 0 SPR2 0 MSTR 0 CPOL x CPHA x SPR1 x SPR0 x 0023h SPICSR Reset value SPIF 0 WCOL 0 OR 0 MODF 00 SOD 0 SSM 0 SSI 0 |
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