ST72344K2 datasheet(78/247 Pages) STMICROELECTRONICS

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I/O ports

ST72344xx, ST2345xx

78/247

Doc ID 12321 Rev 6

It is recommended not to change the voltage level or loading on any port pin while

conversion is in progress. Furthermore, it is recommended not to have clocking pins located

close to a selected analog pin.

Warning:

The analog input voltage level must be within the limits

stated in the absolute maximum ratings.

10.3

I/O port implementation

The hardware implementation on each I/O port depends on the settings in the DDR and OR

registers and specific feature of the I/O port such as ADC Input or true open drain.

Switching these I/O ports from one state to another should be done in a sequence that

prevents unwanted side effects. Recommended safe transitions are illustrated in Figure 36.

Other transitions are potentially risky and should be avoided, since they are likely to present

unwanted side-effects such as spurious interrupt generation.

Figure 36.

Interrupt I/O port state transitions

10.4

Low-power modes

10.5

Interrupts

The external interrupt event generates an interrupt if the corresponding configuration is

selected with DDR and OR registers and the interrupt mask in the CC register is not active

(RIM instruction).

floating/pull-up

interrupt

INPUT

floating

(reset state)

INPUT

open-drain

OUTPUT

push-pull

OUTPUT

= DDR, OR

Table 29.

Description

Mode

Description

Wait

No effect on I/O ports. External interrupts cause the device to exit from Wait mode.

Halt

No effect on I/O ports. External interrupts cause the device to exit from Halt mode.

Table 30.

Description of interrupt events

Interrupt event

Event flag

Enable

Control bit

Exit from

Wait

Exit from

Halt

External interrupt on selected

external event

DDRx

ORx

Yes

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