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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST72344K2 датащи(PDF) 132 Page - STMicroelectronics |
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ST72344K2 датащи(HTML) 132 Page - STMicroelectronics |
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132 / 247 page  On-chip peripherals ST72344xx, ST2345xx 132/247 Doc ID 12321 Rev 6 11.5.4 Functional description The block diagram of the Serial Control Interface, is shown in Figure 63. It contains six dedicated registers: ● 2 control registers (SCICR1 and SCICR2) ● A status register (SCISR) ● A baud rate register (SCIBRR) ● An extended prescaler receiver register (SCIERPR) ● An extended prescaler transmitter register (SCIETPR) Refer to the register descriptions in Section 11.5.7 for the definitions of each bit. Serial data format Word length may be selected as being either 8 or 9 bits by programming the M bit in the SCICR1 register (see Figure 64). The TDO pin is in low state during the start bit. The TDO pin is in high state during the stop bit. An Idle character is interpreted as an entire frame of “1”s followed by the start bit of the next frame which contains data. A Break character is interpreted on receiving “0”s for some multiple of the frame period. At the end of the last break frame the transmitter inserts an extra “1” bit to acknowledge the start bit. Transmission and reception are driven by their own baud rate generator. |
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