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5.2 Pin Assignments

The tables in this section use several common abbreviations. Table 2. lists the mnemonics and their meanings.

In the next section, description of each signal within its associated functional group is provided.

5.3 Signal Descriptions

5.3.1 Reset Signals

5.3.2 Clock Interface Signals

Table 2. Pin Type Definitions

Mnemonic

Definition

I

Standard input pin.

I/O

Bidirectional pin.

O

Totem-pole output.

OD

Open-drain output structure that allows multiple devices to share the pin in a wired-OR configuration.

PU

Pull-up resistor.

PD

Pull-down resistor.

smt

Schmitt Trigger.

s/t/s

Sustained TRI-STATE, an active-low TRI-STATE signal owned and driven by one and only one agent at a

time. The agent that drives an s/t/s pin low must drive it high for at least one clock before letting it float. A

new agent cannot start driving an s/t/s signal any sooner than one clock after the previous owner lets it float.

A pull-up resistor is required to sustain the inactive state until another agent drives it and must be provided

by the central resource.

t/s

TRI-STATE signal.

VDD (PWR) Power pin.

VSS (GND) Ground pin.

#

The "#" symbol at the end of a signal name indicates that the active, or asserted state occurs when the signal

is at a low voltage level. When "#" is not present after the signal name, the signal is asserted when at a high

voltage level.

Signal Name

Pin

No.

Type

Description

PCIRST#

124

I

PCI Reset

PCIRST# is the reset signal for the PCI bus.

RSTDRV

135

O

Reset Drive

This signal is asserted to reset devices that reside on the ISA bus. It will be driven

by the inverse of the PCIRST# input signal.

Signal Name

Pin No.

Type

Description

PCICLK

123

I

PCI Clock

This clock runs at the PCI clock frequency and is used to drive most of the

PC87200 circuitry.

SYSCLK

8

O

ISA Bus Clock

ISACLK is derived from PCICLK and is typically programmed for 8.33MHz.

F0 Index 50h[2:0] is used to program the ISA clock divisor. These bits determine

the divisor of the PCI clock used to generate the ISA bus clock. If F0 Index

50h[2:0] is set to:

010 = Divide by three (sysclk=11MHz)

011 = Divide by four (sysclk = 8.33MHz)

All other values are invalid and can produce unexpected results.