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ADP1050ACPZ-R7 датащи(PDF) 31 Page - Analog Devices

номер детали ADP1050ACPZ-R7
подробное описание детали  Versatile digital voltage mode controller
PDF  93 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADP1050ACPZ-R7 датащи(HTML) 31 Page - Analog Devices

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ADP1050
Data Sheet
TEMPERATURE LINEARIZATION SCHEME
The ADP1050 linearization scheme is based on a combination of a
thermistor (R25 = 100 kΩ, 1%), an external resistor (16.5 kΩ, 1%),
and the 46 µA current source, preselected for best performance
when linearizing measured temperatures in the industrial range.
The NTC thermistor that is required must have a resistance of
R25 = 100 kΩ, 1%, such as the NCP15WF104F03RC (beta = 4250,
1%). It is recommended that 1% tolerance be used for both the
resistor and beta values. The linearization equations show the
relationship between the RTD voltage, VRTD (in volts), and
temperature reading, T (in degrees Celsius).
If T < 104°C,
VRTD = (130 − T) ×
256
6
.
1
If T ≥ 104°C,
VRTD = (156 − T) ×
512
6
.
1
where T represents the temperature reading in Register 0x8D.
Figure 32 shows the temperature linearization curves.
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
10
20
30
40
50
60
TEMPERATURE (°C)
70
80
90
100 110 120 130
LINEARIZATION VOLT TEMP CURVE
ACTUAL VOLT TEMP CURVE
Figure 32. Temperature Linearization Scheme Curves
Using the internal linearization scheme, the READ_TEMPERA-
TURE command (Register 0x8D) returns the current temperature
in degrees Celsius. For overtemperature protection, the user can
directly set the OT_FAULT_LIMIT command (Register 0x4F) in
degrees Celsius. See the OT_FAULT and OT_WARNING section
for more information.
PMBus PROTECTION COMMANDS
VOUT Overvoltage Protection (OVP)
The VOUT overvoltage protection feature in the ADP1050
follows PMBus specifications. The limits are programmed in
the VOUT_OV_FAULT_LIMIT command (Register 0x40) to
correspond to the voltage between 75% and 150% of the nominal
output voltage. The responses are programmed using the VOUT_
OV_FAULT_RESPONSE command (Register 0x41). The
VOUT_OV_FAULT flag (Register 0x78[5], Register 0x79[5],
and Register 0x7A[7]) is set when the voltage reading exceeds the
overvoltage limit.
In a direct parallel system, multiple power supply units are
connected directly in parallel without any OR’ing device. An
overvoltage condition in one power supply can raise the common
bus voltage, causing the activation of overvoltage protection in
the other power supplies connected to the common bus. As a
result of this overvoltage protection action, the common bus
may fail. The ADP1050 provides a highly flexible, conditional
overvoltage protection function for redundant control in a direct
parallel system. It consists of an overvoltage detection block, a
modulation flag triggering block, and an overvoltage response
block (see Figure 33).
VOUT_OV_FAULT
FLAG DEBOUNCE
REG 0xFE26[7:6]
VO
OVP
VS–
VOUT_OV_FAULT_RESPONSE
REG 0x41
MODULATION
VALUE
MODULATION
THRESHOLD
REG 0xFE6B
AND
AND
0
0
0
0
0
0
EXTENDED
VOUT_OV_FAULT_RESPONSE
REG 0xFE01[7:4]
VOUT_OV_FAULT_LIMIT
REG 0x40
VOUT_OV_FAULT
REG 0x7A[7]
CONDITIONAL OVP ENABLE
REG 0xFE6C[0]
LARGE_MODULATION
REG 0xFE6C[2]
DAC
Figure 33. VOUT Overvoltage Protection Circuit Implementation
Rev. A | Page 30 of 92



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