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HMC700LP4 датащи(PDF) 15 Page - Analog Devices |
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HMC700LP4 датащи(HTML) 15 Page - Analog Devices |
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15 / 26 page ![]() For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com Application Support: apps@hittite.com 0 0 - 15 HMC700LP4 / 700LP4E v11.0411 8 GHz 16-Bit Fractional-N PLL Integer Mode the HMc700LP4(E) synthesizer is capable of operating in integer mode. in integer mode the synthesizer step size is fixed to that of the PFD frequency, fPFD. integer mode typically has the lower phase noise for a given PFD operating frequency, than fractional mode. the advantage is usually of the order of 4 to 6 dB. integer mode, how- ever, often requires a lower PFD frequency to meet step size requirements. the fractional mode advantage is that higher PFD frequencies can be used, hence lower phase noise can often be realized in fractional mode. Integer Frequency Tuning in integer mode the digital ∆∑ modulator is shut off and the division ratio of the prescaler is set at a fixed value. to run in integer mode clear frac_rstb and buffrstb table 13. then program the integer portion of the frequency as explained by (EQ 4), ignoring the fractional part. VCO Divider Register Buffering the Vco divider registers inside the HMc700LP4E are not double buffered. as soon as either the integer (reg 3) or fractional (reg 4) Vco divider register is programmed the new value takes effect. Under certain conditions, this can present a momentary mis-load of the internal Vco divider which can take several milliseconds to clear. in time sensitive frequency settling applications a specific programming sequence is required to avoid this delay. this delay arises only when the upper 11 bits of the 16 bit Vco divider (reg 3) are all changing state such that none of the bits remain as a 1. in time sensitive applications the following programming sequence should be used. For Fractional Mode: Write register 5 = 0h (zero the Seed); Write register 4 = 0h (zero the Fractional divide value); Write register 3 to the ‘intermediate’ integer divide value; Write register 3 to the final integer divide value; Write register 5 = 50894ch (or any other non-zero value); Write register 4 to the final fractional divide value; For Integer Mode: Write register 3 to the ‘intermediate’ integer divide value; Write register 3 to the final integer divide value; the ‘intermediate’ Vco Divider register value (register 3) must have a ‘1’ in the upper 11 bits (lower 5 bits do not matter) that does not change when going from the starting value to the intermediate value and then from the intermediate value to the final value. a simple algorithm to calculate a suitable interim value is to ‘or’ the register 3 Start value with the register 3 Final value. For example, if you are going from 74h to 80h the ‘or’ed value would be F4h. this behaviour is not present on other Hittite Microwave PLL devices. Soft Reset and Power on Reset the HMc700LP4(E) features a hardware Power on reset (Por). all chip registers will be reset to default states approximately 250us after power up. the SPi registers may also be soft reset by an SPi write to strobe register rst_swrst (table 7) Power Down Mode chip Power Down is done by deasserting chip Enable, cE, pin 23 (Low = Disabled). this will result in all analog functions and internal clocks disabled. current consumption will typically drop below 10µa in Power Down state. During Power Down, the serial register writes will still operate, however, serial data output is disabled so read operations will not work. it is possible to control Power Down Mode from the serial port register rst_chipen_from_spi by clearing rst_chipen_ pin_select (table 8). Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D |
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