ADF4356BCPZ datasheet(14/35 Pages) AD

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ADF4356

Data Sheet

Rev. 0 | Page 14 of 35

PROGRAM MODES

Table 6 and Figure 28 through Figure 41 show how the program

modes must be set up for the ADF4356.

The following settings in the ADF4356 are double-buffered: main

fractional value (FRAC1), auxiliary modulus value (MOD2),

auxiliary fractional value (FRAC2), reference doubler, reference

divide by 2 (RDIV2), R counter value, and charge pump current

setting. Two events must occur before the ADF4356 uses a new

value for any of the double-buffered settings. First, the new value

must latch into the device by writing to the appropriate register,

and second, a new write to Register 0 must be performed.

For example, to ensure that the modulus value loads correctly,

every time that the modulus value updates, Register 0 must be

written to. The RF divider select in Register 6 is also double

buffered, but only if DB14 of Register 4 is high.

VCO

The VCO core in the ADF4356 consists of four separate VCOs,

each of which uses 256 overlapping bands, which allows the

device to cover a wide frequency range without large VCO

sensitivity (KV) and without resulting poor phase noise and

spurious performance.

The correct VCO and band are chosen automatically by the

VCO and band select logic when Register 0 is updated and auto-

calibration is enabled.

The R counter output is used as the clock for the band select logic.

After band selection, normal PLL action resumes. The nominal

value of KV is 25 MHz/V when the N divider is driven from the

VCO output, or the KV value is divided by D. D is the output

divider value if the N divider is driven from the RF output divider

(chosen by programming Bits[DB23:DB21] in Register 6).

The VCO shows variation of KV as the tuning voltage, VTUNE,

varies within the band and from band to band. For wideband

applications covering a wide frequency range (and changing

output dividers), a value of 25 MHz/V provides the most accurate

KV, because this value is closest to the average value. Figure 24

shows how KV varies with fundamental VCO frequency along with

an average value for the frequency band. Users may prefer this

figure when using narrow-band designs.

AVERAGE

VCO SENSITIVITY

LINEAR

TREND LINE

FREQUENCY (GHz)

3.43.84.24.65.05.4

5.8

6.2

6.6

Figure 24. VCO Sensitivity, KV vs. Frequency

OUTPUT STAGE

The RFOUTA+ and RFOUTA− pins of the ADF4356 connect to

the collectors of an NPN differential pair driven by buffered

outputs of the VCO, as shown in Figure 25. In this scheme,

the ADF4356 contains internal 50 Ω resistors connected to

the VRF pin. To optimize the power dissipation vs. the output

power requirements, the tail current of the differential pair is

programmable using Bits[DB2:DB1] in Register 6. Four current

levels can be set. These levels give approximate output power

levels of −4 dBm, −1 dBm, +2 dBm, and +5 dBm, respectively.

Levels of −4 dBm, −1 dBm, and +2 dBm can be achieved using

a 50 Ω resistor to VRF and ac coupling into a 50 Ω load. For

accurate power levels, refer to the Typical Performance

Characteristics section. An output power of 5 dBm requires an

external shunt inductor to provide higher power levels; however,

this addition results in less wideband performance using the

internal bias only. Terminate the unused complementary output

with a similar circuit to the used output.

VCO

RFOUTA+

RFOUTA–

VRF

50Ω

BUFFER/

DIVIDE BY

1/2/4/8/

16/32/64

Figure 25. Output Stage

Another feature of the ADF4356 is that the supply current to

the RFOUTA+/RFOUTA− output stage can shut down until the

ADF4356 achieves lock as measured by the digital lock detect

circuitry. The mute till lock detect (MTLD) bit (Bit DB11) in

The RFOUTB+/RFOUTB− pins are duplicate outputs that can be

used independently or in addition to the RFOUTA+/RFOUTA− pins.

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