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LAN89730 датащи(PDF) 106 Page - Microchip Technology

номер детали LAN89730
подробное описание детали  Implements Reduced Power Operating Modes
PDF  218 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN89730 датащи(HTML) 106 Page - Microchip Technology

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LAN89730
DS60001348A-page 106
 2013-2015 Microchip Technology Inc.
FIGURE 4-31:
DETAILED GPIOS 0-6 WAKE DETECTION LOGIC
Note:
The IME bit is in the Hardware Configuration Register (HW_CFG). General Purpose IO Configuration Reg-
ister (GPIO_CFG) and General Purpose IO Wake Enable and Polarity Register (GPIO_WAKE) must be set
accordingly. Diagram does not represent actual hardware implementation.
FIGURE 4-32:
DETAILED GPIO7 WAKE DETECTION LOGIC
GPIOn_INT clear
GPIOn
GPIOPOLn
Latch
GPIODIRn
GPIODn
GPIOENn
GPIOWKn
GPIOn_DET
IME
GPIO7_INT clear
GPIO7
GPIOPOL7
Latch
GPIODIR7
GPIOD7
GPIOEN7
GPIOWK7
IME
0
1
0
1
GPIO7_DET
SUSPEND0
SUSPEND3
PHY_LINK_EN
PHY_LINK_UP



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