LAN89730 datasheet(100/218 Pages) MICROCHIP

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LAN89730

DS60001348A-page 100

 2013-2015 Microchip Technology Inc.

The RAM Test Mode Enable (TESTEN) bit must be deasserted after programming the Descriptor RAM.

4.8.4

ENABLE DESCRIPTOR RAM AND FLAG ATTRIBUTE REGISTERS AS SOURCE

The EEPROM Emulation Enable (EEM) bit of the Hardware Configuration Register (HW_CFG) must be configured by

the software device driver to use the Descriptor RAM and the Attributes registers for custom operation. Upon assertion

of EEPROM Emulation Enable (EEM), the hardware will utilize the descriptor information contained in the Descriptor

RAM, the Attributes registers, and the values of the items listed in Section 4.8.1 to facilitate custom operation.

4.8.5

INHIBIT RESET OF SELECT SCSR ELEMENTS

The software device driver must take care to ensure that the contents of the Descriptor RAM and SCSR register content

critical to custom operation using Descriptor RAM are preserved across reset operations other than POR. The driver

must configure the Reset Protection (RST_PROTECT) bit of the Hardware Configuration Register (HW_CFG) in order

to accomplish this.

The following registers have contents that can be preserved across all resets other than POR. Consult the register’s

description for additional details.

• Descriptor RAM

• Attributes registers

• MAC Address High Register (ADDRH) and MAC Address Low Register (ADDRL)

FIGURE 4-28:

DESCRIPTOR RAM EXAMPLE

Language ID Descriptor

Manufacturing String Descriptor

Product Name String Descriptor

Serial Number String Descriptor

Configuration String Descriptor

Interface String Descriptor

HS Device Descriptor

HS Configuration and Interface Descriptor

FS Device Descriptor

FS Configuration and Interface Descriptor

DATAPORT

ADDR

= Unused Space Required For Alignment Purposes

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