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LAN89730 датащи(PDF) 81 Page - Microchip Technology

номер детали LAN89730
подробное описание детали  Implements Reduced Power Operating Modes
PDF  218 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN89730 датащи(HTML) 81 Page - Microchip Technology

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DS60001348A-page 81
LAN89730
The 10M PLL is locked onto the received Manchester signal and from this, generates the received 20 MHz clock. Using
this clock, the Manchester encoded data is extracted and converted to a 10 MHz NRZI data stream. It is then converted
from serial to 4-bit wide parallel data.
The RX10M block also detects valid 10Base-T IDLE signals - Normal Link Pulses (NLPs) - to maintain the link.
4.6.4.3
Jabber Detection
Jabber is a condition in which a station transmits for a period of time longer than the maximum permissible packet length,
usually due to a fault condition, that results in holding the TX_EN input for a long period. Special logic is used to detect
the jabber state and abort the transmission to the line, within 45 ms. Once TX_EN is deasserted, the logic resets the
jabber condition.
4.6.5
AUTO-NEGOTIATION
The purpose of the auto-negotiation function is to automatically configure the PHY to the optimum link parameters based
on the capabilities of its link partner. Auto-negotiation is a mechanism for exchanging configuration information between
two link-partners and automatically selecting the highest performance mode of operation supported by both sides. Auto-
negotiation is fully defined in clause 28 of the IEEE 802.3 specification.
Once auto-negotiation has completed, information about the resolved link can be passed back to the controller via the
internal Serial Management Interface (SMI). The results of the negotiation process are reflected in the Speed Indication
bits in register 31, as well as the Link Partner Ability register (Register 5).
The auto-negotiation protocol is a purely physical layer activity and proceeds independently of the MAC controller.
The advertised capabilities of the PHY are stored in register 4 of the SMI registers. The default advertised by the PHY
is determined by user-defined on-chip signal options.
The following blocks are activated during an auto-negotiation session:
• Auto-negotiation (digital)
• 100M ADC (analog)
• 100M PLL (analog)
• 100M equalizer/BLW/clock recovery (DSP)
• 10M SQUELCH (analog)
• 10M PLL (analog)
• 10M Transmitter (analog)
When enabled, auto-negotiation is started by the occurrence of one of the following events:
• Hardware reset
• Software reset
• Power-down reset
• Link status down
• Setting register 0, bit 9 high (auto-negotiation restart)
On detection of one of these events, the PHY begins auto-negotiation by transmitting bursts of Fast Link Pulses (FLP).
These are bursts of link pulses from the 10M transmitter. They are shaped as Normal Link Pulses and can pass uncor-
rupted down CAT-3 or CAT-5 cable. A Fast Link Pulse Burst consists of up to 33 pulses. The 17 odd-numbered pulses,
which are always present, frame the FLP burst. The 16 even-numbered pulses, which may be present or absent, contain
the data word being transmitted. Presence of a data pulse represents a “1”, while absence represents a “0”.
The data transmitted by an FLP burst is known as a Link Code Word. These are defined fully in IEEE 802.3 clause 28.
In summary, the PHY advertises 802.3 compliance in its selector field (the first 5 bits of the Link Code Word). It adver-
tises its technology ability according to the bits set in register 4 of the SMI registers.
There are 4 possible matches of the technology abilities. In the order of priority these are:
• 100M full-duplex (highest priority)
• 100M half-duplex
• 10M full-duplex
• 10M half-duplex



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