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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LAN89730 датащи(PDF) 76 Page - Microchip Technology |
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LAN89730 датащи(HTML) 76 Page - Microchip Technology |
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76 / 218 page  LAN89730 DS60001348A-page 76 2013-2015 Microchip Technology Inc. // Check that the VOH Compliance mode is active PHY_VOHCOMP_CHECK: MII_Write: Address 0x14, Data 0x86C0 (Read MII Address 0x14 until Bit 15 is cleared) MII_Read: Address 0x15 (if ReadData = 16'bXXXXXX11XXXXXXXX, then VOH Compliance is enabled) The entire sequence that should occur is: REG_ACCESS_ENABLE -> PHY_VOHCOMP_ENABLE -> PHY_VOHCOMP_CHECK It is recommended to run this sequence upon the following list of events detected by the software driver: 1. Device Hardware Reset: a) Assertion of the External Chip Reset (nRESET) b) Power on Reset (POR) 2. Device Software Reset: a) Setting of the Soft Reset (SRST) bit of the Hardware Configuration Register (HW_CFG) b) Setting of the PHY Soft Reset bit of the Basic Control Register 3. Exit from Energy Detect Power-Down (EDPD) mode 4. Auto-Negotiation Enable/Disable via the Auto-Negotiation Enable bit of the Basic Control Register 5. Exit from General Power-Down mode 4.6.1 100BASE-TX TRANSMIT The data path of the 100Base-TX is shown in Figure 4-17. Each major block is explained in the following sections. FIGURE 4-17: 100BASE-TX DATA PATH MAC Tx Driver MLT-3 Converter NRZI Converter 4B/5B Encoder Magnetics CAT-5 RJ45 100M PLL Internal MII 25 MHz by 4 bits TX_CLK 25 MHz by 5 bits NRZI MLT-3 MLT-3 MLT-3 MLT-3 Scrambler and PISO 125 Mbps Serial MII 25 MHz by 4 bits |
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