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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LAN8741Ai-EN датащи(PDF) 88 Page - Microchip Technology |
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LAN8741Ai-EN датащи(HTML) 88 Page - Microchip Technology |
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88 / 106 page  LAN8741A/LAN8741Ai DS00001988A-page 88 2013-2015 Microchip Technology Inc. 5.6.2 POWER-ON nRST & CONFIGURATION STRAP TIMING This diagram illustrates the nRST reset and configuration strap timing requirements in relation to power-on. A hardware reset (nRST assertion) is required following power-up. For proper operation, nRST must be asserted for no less than trstia. The nRST pin can be asserted at any time, but must not be deasserted before tpurstd after all external power sup- plies have reached operational levels. In order for valid configuration strap values to be read at power-up, the tcss and tcsh timing constraints must be followed. Refer to Section 3.8.6, "Resets" for additional information. Note 1: 20 clock cycles for 25 MHz, or 40 clock cycles for 50 MHz FIGURE 5-2: POWER-ON nRST & CONFIGURATION STRAP TIMING TABLE 5-8: POWER-ON nRST & CONFIGURATION STRAP TIMING VALUES Symbol Description Min. Typ. Max. Unit tpurstd External power supplies at operational level to nRST deassertion 25 ms tpurstv External power supplies at operational level to nRST valid 0ns trstia nRST input assertion time 100 µs tcss Configuration strap pins setup to nRST deassertion 200 ns tcsh Configuration strap pins hold after nRST deassertion 1 ns totaa Output tri-state after nRST assertion 50 ns todad Output drive after nRST deassertion 2 800 (see Note 1) ns Note: nRST deassertion must be monotonic. Note: Device configuration straps are latched as a result of nRST assertion. Refer to Section 3.7, "Configuration Straps" for details. Configuration straps must only be pulled high or low and must not be driven as inputs. tcss nRST Configuration Strap Pins Input trstia tcsh Configuration Strap Pins Output Drive todad All External Power Supplies tpurstd Vopp tpurstv totaa |
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