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LAN8741Ai-EN датащи(PDF) 32 Page - Microchip Technology |
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LAN8741Ai-EN датащи(HTML) 32 Page - Microchip Technology |
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32 / 106 page ![]() LAN8741A/LAN8741Ai DS00001988A-page 32 2013-2015 Microchip Technology Inc. 3.7.3 RMIISEL: MII/RMII MODE CONFIGURATION MII or RMII mode selection is latched on the rising edge of the internal reset (nRST) based on the strapping of the RMIISEL configuration strap. The default mode is MII (via the internal pull-down resistor). To select RMII mode, pull the RMIISEL configuration strap high with an external resistor to VDDIO. When the nRST pin is deasserted, the MIIMODE bit of the Special Modes Register is loaded according to the RMIISEL configuration strap. The mode is reflected in the MIIMODE bit of the Special Modes Register. Refer to Section 3.4, "MAC Interface" for additional information on MII and RMII modes. 3.7.4 REGOFF: INTERNAL +1.2 V REGULATOR CONFIGURATION The incorporation of flexPWR technology provides the ability to disable the internal +1.2 V regulator. When the regulator is disabled, an external +1.2 V must be supplied to the VDDCR pin. Disabling the internal +1.2 V regulator makes it possible to reduce total system power, since an external switching regulator with greater efficiency (versus the internal linear regulator) can be used to provide +1.2 V to the transceiver circuitry. 3.7.4.1 Disabling the Internal +1.2 V Regulator To disable the +1.2 V internal regulator, a pull-up strapping resistor should be connected from the REGOFF configura- tion strap to VDD2A. At power-on, after both VDDIO and VDD2A are within specification, the transceiver will sample REGOFF to determine whether the internal regulator should turn on. If the pin is sampled at a voltage greater than VIH, then the internal regulator is disabled and the system must supply +1.2 V to the VDDCR pin. The VDDIO voltage must be at least 80% of the operating voltage level (1.44 V when operating at 1.8 V, 2.0 V when operating at 2.5 V, 2.64 V when operating at 3.3 V) before voltage is applied to VDDCR. As described in Section 3.7.4.2, when REGOFF is left floating or connected to VSS, the internal regulator is enabled and the system is not required to supply +1.2 V to the VDDCR pin. 3.7.4.2 Enabling the Internal +1.2 V Regulator The +1.2 V for VDDCR is supplied by the on-chip regulator unless the transceiver is configured for the regulator off mode using the REGOFF configuration strap as described in Section 3.7.4.1. By default, the internal +1.2 V regulator is enabled when REGOFF is floating (due to the internal pull-down resistor). During power-on, if REGOFF is sampled below VIL, then the internal +1.2 V regulator will turn on and operate with power from the VDD2A pin. 3.7.5 nINTSEL: nINT/TXER/TXD4 CONFIGURATION The nINT, TXER, and TXD4 functions share a common pin. There are two functional modes for this pin, the TXER/TXD4 mode and nINT (interrupt) mode. The nINTSEL configuration strap is latched at POR and on the rising edge of the nRST. By default, nINTSEL is configured for nINT mode via the internal pull-up resistor. Note: Because the REGOFF configuration strap shares functionality with the LED1 pin, proper consideration must also be given to the LED polarity. Refer to Section 3.8.1, "LEDs" for additional information on the rela- tion between REGOFF and the LED1 polarity. Note: In order to utilize EEE, the nINT/TXER/TXD4 pin must be configured as TXER/TXD4. Note: Because the nINTSEL configuration strap shares functionality with the LED2 pin, proper consideration must also be given to the LED polarity. Refer to Section 3.8.1.2, "nINTSEL and LED2 Polarity Selection" for additional information on the relation between nINTSEL and the LED2 polarity. |
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