LAN8741AI-EN datasheet(31/106 Pages) MICROCHIP

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DS00001988A-page 31

LAN8741A/LAN8741Ai

3.7.2

MODE[2:0]: MODE CONFIGURATION

The MODE[2:0] configuration straps control the configuration of the 10/100 digital block. When the nRST pin is deas-

serted, the register bit values are loaded according to the MODE[2:0] configuration straps. The 10/100 digital block is

then configured by the register bit values. When a soft reset occurs via the Soft Reset bit of the Basic Control Register,

the configuration of the 10/100 digital block is controlled by the register bit values and the MODE[2:0] configuration

straps have no affect.

The device’s mode may be configured using the hardware configuration straps as summarized in Table 3-6. The user

may configure the transceiver mode by writing the SMI registers.

The MODE[2:0] hardware configuration pins are multiplexed with other signals as shown in Table 3-7.

TABLE 3-6:

MODE[2:0] BUS

MODE[2:0]

Mode Definitions

Default Register Bit Values

[13,12,10,8]

[8,7,6,5]

000

10BASE-T Half Duplex. Auto-negotiation disabled.

0000

N/A

001

10BASE-T Full Duplex. Auto-negotiation disabled.

0001

N/A

010

100BASE-TX Half Duplex. Auto-negotiation disabled.

CRS is active during Transmit & Receive.

1000

N/A

011

100BASE-TX Full Duplex. Auto-negotiation disabled.

CRS is active during Receive.

1001

N/A

100

100BASE-TX Half Duplex is advertised. Auto-negoti-

ation enabled.

CRS is active during Transmit & Receive.

1100

0100

101

Repeater mode. Auto-negotiation enabled.

100BASE-TX Half Duplex is advertised.

CRS is active during Receive.

1100

0100

110

Power-Down mode. In this mode the transceiver will

wake-up in Power-Down mode. The transceiver can-

not be used when the MODE[2:0] bits are set to this

mode. To exit this mode, the MODE bits in Register

18.7:5 (see Section 4.2.14, "Special Modes Register")

must be configured to some other value and a soft

reset must be issued.

N/A

111

All capable. Auto-negotiation enabled.

X10X

1111

TABLE 3-7:

PIN NAMES FOR MODE BITS

MODE Bit

Pin Name

MODE[0]

RXD0/MODE0

MODE[1]

RXD1/MODE1

MODE[2]

COL/CRS_DV/MODE2

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