PM6344 datasheet(12/256 Pages) PMC

12 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

LIST OF TABLES

TABLE 1

- NORMAL MODE REGISTER MEMORY MAP.....................................................48

TABLE 2

- ..............................................................................................................................74

TABLE 3

- ..............................................................................................................................87

TABLE 4

- ............................................................................................................................177

TABLE 5

- ............................................................................................................................177

TABLE 6

- CONFIGURING THE EQUAD FROM RESET ...................................................191

TABLE 7

- ............................................................................................................................210

TABLE 8

- EQUAD CAPACITANCE.....................................................................................217

TABLE 9

- EQUAD D.C. CHARACTERISTICS....................................................................218

TABLE 10

- MICROPROCESSOR READ ACCESS (FIGURE 35) .......................................220

TABLE 11

- MICROPROCESSOR WRITE ACCESS (FIGURE 36) ......................................222

TABLE 12

- BACKPLANE TRANSMIT INPUT TIMING, MENB INPUT HIGH (FIGURE 37).225

TABLE 13

- BACKPLANE TRANSMIT INPUT TIMING, MENB INPUT LOW (FIGURE 37)..226

TABLE 14

- XCLK=49.152 MHZ INPUT (FIGURE 39)..........................................................227

TABLE 15

- TCLKI INPUT (FIGURE 40 ................................................................................227

TABLE 16

- DIGITAL RECEIVE INTERFACE INPUT TIMING (FIGURE 41) ........................228

TABLE 17

- TRANSMIT DATA LINK INPUT TIMING (FIGURE 42) .......................................230

TABLE 18

- BACKPLANE RECEIVE TIMING, MENB INPUT HIGH (FIGURE 43) ...............231

TABLE 19

- BACKPLANE RECEIVE TIMING, MENB INPUT HIGH, RCLKOSEL = 1 (FIGURE

44) ........................................................................................................................232

TABLE 20

- MULTIPLEXED BACKPLANE RECEIVE TIMING, MENB INPUT LOW (FIGURE

45) ........................................................................................................................233

TABLE 21

- RECEIVE DATA LINK OUTPUT TIMING (FIGURE 46) .....................................234

TABLE 22

- RECOVERED FRAME PULSE OUTPUT TIMING (FIGURE 47).......................234

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