PM6344 datasheet(70/256 Pages) PMC

70 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

rail or single rail format. When BRX2RAIL is set to logic 1, the multifunction

pins become the BRDP[x] and BRDN[x] dual rail outputs, which contain the

received positive and negative line pulses timed to the 2.048MHz receive line

rate, RCLKO[x]. When BRX2RAIL is set to logic 0, the multifunction pins

become the BRPCM[x] and BRSIG[x] digital outputs.

OOSMFAIS:

This bit controls the receive backplane signaling trunk conditioning in an out

of signaling multiframe condition. If OOSMFAIS is set to a logic 0, an

OOSMF indication from the FRMR does not affect the BRSIG[x] outputs.

When OOSMFAIS is a logic 1, an OOSMF indication from the FRMR will

cause the BRSIG[x] outputs to be set to all 1's.

ROHM, BRXSMFP, BRXCMFP:

The ROHM, BRXSMFP and BRXCMFP bits select the output signal seen on

the backplane output BRFPO[x]. The following table summarizes the

configurations:

ROHM

BRXSMFP

BRXCMFP

Result

Backplane receive frame pulse output:

BRFPO[x] pulses high for 1 BRCLK cycle

(or 1 RCLKO[x] cycle if ELST is by-passed)

during bit 1 of each 256-bit frame, indicating

the frame alignment of the BRPCM[x] data

stream.

Backplane receive CRC multiframe output:

BRFPO[x] pulses high for 1 BRCLK cycle

(or 1 RCLKO[x] cycle if ELST is by-passed

or RCLKOSEL is set to logic 1) during bit 1

of frame 1 of every 16 frame CRC

multiframe, indicating the CRC multiframe

alignment of the BRPCM[x] data stream.

(Even when CRC multiframing is disabled,

the BRFPO[x] output continues to indicate

the position of bit 1 of the FAS frame every

16th frame).

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