PM6344 datasheet(53/256 Pages) PMC

53 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

frame within a signaling multiframe and buffered. The SIGX selectively

debounces the bits, and serializes the results onto the 2048 kbit/s serial stream

BRSIG[x] output. Buffered signaling data is aligned with its associated voice

timeslot in the E1 frame.

The SIGX provides user control over signaling freezing with a 95% confidence

level of freezing with valid signaling data for a 50% ones density out-of-frame

condition. The SIGX also provides control over timeslot data inversion, trunk

conditioning, and signaling debounce on a per-timeslot basis directly, via the

Microprocessor Interface (MPIF).

8.8

Backplane Receive Interface (BRIF)

The Backplane Receive Interface allows data to be presented to a backplane in

either a 2.048 Mbit/s or a 16.384 Mbit/s serial stream and allows BPV

transparency by outputting dual-rail data at 2.048 Mbit/s.

The block generates the output data stream on the BRPCM[x] pin containing 32

timeslot bytes of data. The BRSIG[x] output pin contains 30 bytes of signaling

nibble data located in the least significant nibble of each byte. The framing

alignment indication on the BRFPO[x] pin can be configured to indicate the first

bit of each 256-bit frame, the first bit of the first frame of the CRC multiframe, the

first bit of the first frame of the signaling multiframe or all overhead bits.

When configured for a multiplexed backplane, the four sets of PCM and signaling

streams are bit interleaved into a 16.384 Mbit/s serial stream. The MRFPI pin

must go to logic "1" for one MRCLK cycle to indicate the alignment of the first

PCM bit of the frame or multiframe from receiver number one.

8.9

Transmitter (TRAN)

The Transmitter function is provided by the TRAN block.

The TRAN generates a 2048 kbit/s data stream according to ITU-T

recommendations, providing individual enables for frame generation, CRC

multiframe generation, and channel associated signaling (CAS) multiframe

generation.

In concert with Transmit Per-Channel Serial Controller (TPSC), the TRAN block

provides per-timeslot control of idle code substitution, data inversion, digital

milliwatt substitution, selection of the signaling source and CAS data. All

timeslots can be forced into a trunk conditioning state (idle code substitution and

PM6344 датащи(PDF) 53 Page - PMC-Sierra, Inc