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DS3134 датащи(PDF) 124 Page - Dallas Semiconductor

номер детали DS3134
подробное описание детали  Chateau Channelized T1 And E1 And HDLC Controller
PDF  203 Pages
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производитель  DALLAS [Dallas Semiconductor]
домашняя страница  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS3134 датащи(HTML) 124 Page - Dallas Semiconductor

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DS3134
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Transmit DMA Memory Organization Figure 8.2.1B
Free Data Buffer Space
Transmit Pending Queue Descriptors:
Contains Index Pointers to Packet Descriptors
of Queued Data Buffers that are Ready
to be Transmitted
Pending Queue Base Address (32)
Pending Queue End Address (16)
Pending Queue Host Write Pointer (16)
Pending Queue DMA Read Pointer (16)
Up to 64K dwords
Free Queue Descriptors Allowed
Transmit Done Queue Descriptors:
Contains Index Pointers to Packet Descriptors
of Data Buffers that have been Transmitted
Done Queue Base Address (32)
Done Queue End Address (16)
Done Queue DMA Write Pointer (16)
Done Queue Host Read Pointer (16)
Up to 64K dwords
Done Queue Descriptors Allowed
Transmit Packet Descriptors:
Contains 32-Bit Addresses
to Data Buffers as well as
Status/Control Information and
Links to Other Packet Descriptors
Descriptor Base Address (32)
Up to 64K Quad dwords
Descriptors Allowed
Used Data Buffer Space
Main Offboard Memory
(32-Bit Address Space)
Internal Chateau Registers
dmatbd



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