CLC5903 datasheet(3/29 Pages) NSC

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Absolute Maximum Ratings

NOTE: Absolute maximum ratings are limiting values, to be

applied individually, and beyond which the serviceability of the

circuit may be impaired. Functional operability under any of

these conditions is not necessarily implied. Exposure to maxi-

mum ratings for extended periods may affect device reliability.

Operating Ratings

Package Thermal Resistance

Reliability Information

Ordering Information

CLC5903 Electrical Characteristics (Note 1)

Positive IO Supply Voltage (VDDIO)

-0.3V to 4.2V

Positive CoreSupply Voltage (VDD)

-0.3V to 2.4V

Voltage on Any Input or Output Pin

-0.3V to VDDIO+0.5V

Input Current at Any Pin

±25mA

Package Input Current

±50mA

Package Dissipation at TA=25°C

ESD Susceptibility

Human Body Model

Machine Model

2000V

200V

Soldering Temperature, Infrared, 10

seconds

300°C

Storage Temperature

-65°C to 150°C

Positive IO Supply Voltage (VDDIO)

3.3V ±10%

Positive Core Supply Voltage (VDD)

1.8V ±10%

Operating Temperature Range

-40°C to +85°C

Package

θja

θjc

128 pin PQFP

39°C/W

20°C/W

128 pin FBGA

30°C/W

N/A

Transistor Count

1.4 million

Order Code

Temperature

Range

Description

CLC5903VLA

-40°C to

+85°C

128-pin PQFP (indus-

trial temperature range)

CLC5903SM

-40°C to

+85°C

128-pin FBGA (indus-

trial temperature range)

DC Characteristics

(FS=78MHz, CIC Decimation=48, F2 Decimation=2; unless specified)

Symbol

Parameter

Min

Typ

Max

Units

VIL

Voltage input low

-0.5

0.7

VIH

Voltage input high

2.3

VDDIO+0.5

IOZ

Input current

VOL

Voltage output low (IOL = 4mA/16mA, see Note 2)

0.4

VOH

Voltage output high (IOH = -4mA/-16mA, see Note 2)

2.4

CIN

Input capacitance

5.0

AC Characteristics

(FS=78MHz, CIC Decimation=48, F2 Decimation=2; unless specified)

Symbol

Parameter (CL=50pF)

Min

Typ

Max

Units

FCK

Clock (CKA|B) Frequency (Figure 7)

MHz

SFDR

Spurious Free Dynamic Range

-100

dBFS

SNR

Signal to Noise Ratio

-127

dBFS

Tuning Resolution

0.02

Phase Resolution

0.005

tMRA

MR Active Time (Figure 5)

CK periods

tMRIC

MR Inactive to first Control Port Access (Figure 5)

CK periods

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