TFP501

SLDS127C

– JULY 2001 – REVISED JULY 2011

www.ti.com

PANEL

PIXEL RATE

ODCK LATCH EDGE

ODCK

DFO

PIXS

OCK_INV

24-bit DSTN

2 pixel/clock

Falling

Gated low

1

1

0

24-bit DSTN

2 pixel/clock

Rising

Gated low

1

1

1

TFP501 OUTPUT DRIVER CONFIGURATIONS

The TFP501 provides flexibility by offering various output driver features that can be used to optimize power

consumption, ground-bounce and power-supply noise. The following sections outline the output driver features

and their effects.

Output driver power down (PDO = low.) Pulling PDO low places all the output drivers, except CTL1 and SCDT,

into a high-impedance state. A weak pulldown (approximately 10

µA) gradually pulls these high-impedance

outputs to a low level to prevent the outputs from floating. The SCDT output, which indicates link-disabled or

link-inactive, can be tied directly to the PDO input to disable the output drivers when the link is inactive or when

the cable is disconnected. An internal pullup on the PDO pin defaults the TFP501 to the normal nonpower-down

output drive mode if left unconnected.

Drive Strength (ST = high for high drive strength, ST = low for low drive strength.) The TFP501 allows for

selectable output drive strength on the data, control, and ODCK outputs. See the dc specifications table for the

the drive as the low output drive strength.

Time Staggered Pixel Output. This option works only in conjunction with the 2-pixel/clock mode (PIXS = high.)

Setting STAG = low will time stagger the even and odd pixel output so as to reduce the amount of instantaneous

current surge from the power supply. Depending on the PCB layout and design this can help reduce the amount

of system ground bounce and power supply noise. The time stagger is such that in 2-pixel/clock mode the even

Depending on system constraints of output load, pixel rate, panel input architecture, and board cost, the TFP501

drive strength and staggered pixel options allow flexibility to reduce system power supply noise, ground bounce

and EMI.

Power Management.

The TFP501 offers several system power management features. The output driver power down (PDO = low) is

an intermediate mode which offers several uses. During this mode, all output drivers except SCDT and CTL1 are

driven to a high-impedance state while the rest of the device circuitry remains active.

The TFP501 power down (PD = low) is a complete power down in that it powers down the digital core, the

analog circuitry and output drivers. All output drivers are placed into a high-impedance state. All inputs are

disabled except for the PD input. The TFP501 does not respond to any digital or analog inputs until PD is pulled

high.

Both PDO and PD have internal pullups so if left unconnected they default the TFP501 to normal operating

modes.

Sync Detect. The TFP501 offers an output, SCDT, to indicate link activity. The TFP501 monitors activity on DE

to determine if the link is active. When 1 million pixel clock periods pass without a transition on DE, the TFP501

considers the link inactive and SCDT is driven low. SCDT goes high immediately after the first eight transitions

SCDT can be used to signal a system power management circuit to initiate a system power down when the link

is considered inactive. The SCDT can also be tied directly to the TFP501 PDO input to power down the output

drivers when the link is inactive. It is not recommended to use the SCDT to drive the PD input since, once in

complete power down, the analog inputs are ignored and the SCDT state does not change. An external, system

power management circuit to drive PD is preferred.

HDCP REGISTER MAP

14

Copyright

© 2001–2011, Texas Instruments Incorporated